Subject: Re: port-mips/16154
To: Stephen Ma <stephenm@employees.org>
From: Chuck Silvers <chuq@chuq.com>
List: port-mips
Date: 11/23/2002 10:54:24
one thing to be careful of here: you must not allow nested interrupts
of the same level as the one you're currently processing as long as the
interrupt handler is using any stack space. otherwise you can overflow
the kernel stack. the sgimips code used to have this problem before
rafal fixed it. see
http://mail-index.netbsd.org/source-changes/2002/04/29/0009.html
there may have been some discussion about this on the lists before that,
I don't remember though.
-Chuck
On Thu, Nov 21, 2002 at 05:15:47PM -0800, Stephen Ma wrote:
> Here's an attempt at a fix. This change reenables soft interrupts in
> the UserGenException code, just after the return from trap() (note
> that trap() will have already reenabled hard interrupts). The idea is
> to allow any pending soft interrupts to run before returning to user
> mode.
>
> This change isn't necessary for the ps2, since that port doesn't use
> the processor's interrupts for soft interrupts, hence the #ifndef
> IPL_ICU_MASK.
>
> Does anyone have any objects to committing this change? It's been
> tested by Emmanuel Dreyfus.
>
> $NetBSD: mipsX_subr.S,v 1.10 2002/11/12 14:00:41 nisimura Exp $
>
> - S
>
> --- mipsX_subr.S.orig Fri Nov 15 17:40:55 2002
> +++ mipsX_subr.S Sun Nov 17 13:57:47 2002
> @@ -737,6 +737,20 @@
> COP0_SYNC
> jal _C_LABEL(trap)
> sw a3, CALLFRAME_SIZ-4(sp) # for debugging
> +#ifndef IPL_ICU_MASK
> +/*
> + * Allow any pending soft interrupts to run. This is needed in the case
> + * of an exception occurring immediately after the return from exception
> + * which would prevent the soft interrupt triggering.
> + */
> + mfc0 t2, MIPS_COP_0_STATUS
> + REG_L t0, CALLFRAME_SIZ + FRAME_SR(sp)
> + and t0, t0, MIPS_INT_MASK
> + DYNAMIC_STATUS_MASK_TOUSER(t0, t1) # machine dependent masking
> + or t0, t0, t2
> + mtc0 t0, MIPS_COP_0_STATUS
> + COP0_SYNC
> +#endif
> /*
> * Check pending asynchronous traps.
> */
>
>