Subject: Re: port-mips/16154
To: None <port-mips@netbsd.org>
From: Toru Nishimura <locore32@gaea.ocn.ne.jp>
List: port-mips
Date: 11/23/2002 20:59:40
Correction...

> FRAME_SR contains the status register value when user processor got
> an exception.  The SR contains;
> - EXL bit is off,    <--  it should be "EXL bit is on"
> - CU1 bit is on,
> - IE bit is on,
> - IM mask whose values as assigned at process initiation.

Toru Nishimura/ALKYL Technology