cgd@broadcom.com commented as;

>> Can MIPS use KSEG0 store for USPACE? 
>
> Yes.  It probably should.  (I think this has been generally agreed for
> a while, but it's not trivial to implement and hasn't ever been
> considered that important i guess.)

The MIPS designer of R2000 considered TLBmiss in KSEG2 was
insignificant and neglectable since OS kernel was expected to use
KSEG0 memory pool for kernel memory allocator.  That's the reason
why UTLBmiss exception entry was made to facilitate user
space TLB refill handler.  KSEG2 TLB miss goes through TLBinvalid
exception instead. This is far slower path.
Unfortunately NetBSD VM is designed not to utilize KSEG0.  I
observe 56 entry TLB is quickly fulfilled by KSEG2 reference well
before /sbin/init is exec'ed.
R4000 TLBrefill exception entry is extended to accept KSEG2 miss.
EXL bit is to remove 3 depth machine state stack of R3000 in order
to refine TLB refill logic.  4MB linear PTE arrangement to cover entire
4GB range works well in a unified way.

Toru Nishimura/ALKYL Technology