Subject: Re: 64-bit Malta Kernel/Userland/Toolchain?
To: None <locore32@gaea.ocn.ne.jp>
From: None <cgd@broadcom.com>
List: port-mips
Date: 07/03/2002 20:20:41
At Thu, 4 Jul 2002 02:43:17 +0000 (UTC), "Toru Nishimura" wrote:
> alpha PTE manipulation is done in table-walk for user address space even though
> kernel PTE is handsomely thru VPT.

Wow, really?

That's surprising to me.  Do you have a cite?  (I'd be interested in
reading the research that motivated the implementation, if it's
available!)

Not only does it go against what is said in the arch. manual (which
could be way outdated 8-), but it goes against my expectations about
system use/behaviour: I'd expect that most user apps would have
limited virtual address space consumption and much locality of
reference.

The obvious cases that would benefit from doing a table-walk would be
apps with large VA spaces, and which have poor locality of faulting
addresses for TLB misses (which you'd _hope_ means a poor locality of
VA references 8-).

However, I suppose if you're also jumping rapidly between processes
and taking page faults, doing virtual lookup for userland would waste
about a TLB entry per process for a VPT page...  I suppose they could
have found that significant enough...


cgd