Subject: Re: MIPS cache rototill progressing!
To: None <port-mips@netbsd.org>
From: Toru Nishimura <nisimura@itc.aist-nara.ac.jp>
List: port-mips
Date: 07/14/2001 12:52:55 
>        (a) The tag format is undefined, but the MIPS32 & MIPS64
>        architectures guarantee that if you put zero into TAGLO _and_
>        TAGHI and then use index store tag, that will correctly
>        initialize the cache tags.  You only do TAGLO, and that is
>        not sufficient.

Thank you for your feedback.  The code is used for a MIPS processor
which does not belong to MIPS32 nor MIPS64.

Tohru Nishimura