nisimura@itc.aist-nara.ac.jp writes:
> As the homework style solution I have a piece of code for cache
> invalidation logics for MIPS processors.

A few notes:

(1) it's not clear why the OS cares to do cache initialization --
which is what you're doing here -- unless it's running fro the boot
vector (in place of a boot ROM).  Cache invalidation should use
invalidate ops, rather than store tag ops.

(2) If you are doing cache initialization, the way you're doing it
here isn't sufficient for generic use on MIPS32 and MIPS64
architecture compliant processors, and may not be sufficient for
earlier processors as well.  In particular, it has (at least) the
following flaws:

	(a) The tag format is undefined, but the MIPS32 & MIPS64
	architectures guarantee that if you put zero into TAGLO _and_
	TAGHI and then use index store tag, that will correctly
	initialize the cache tags.  You only do TAGLO, and that is
	not sufficient.

	(b) Under MIPS32 and MIPS64, processors are allowed to define
	(at least -- i'd have to read carefully to rule out more 8-)
	two sets of TAGLO and TAGHI registers, one for the I-cache
	(sel 0) and one for the D-cache (sel 2).  Therefore:

		(i) before doing I-cache, you should zero
		TAGLO (28,0) and TAGHI (29,0), and
		
		(ii) before doing D-cache, you should zero those
		mentioned in (i) above, but also the (28,2) and (29,2)
		registers.

(An example of pre-MIPS32/MIPS64 CPUs which might exhibit requirements
like these is the IDT RC32364, or whichever of the MIPS32-ish CPUs
that Chuck Cranor was hacking on -- i forget which one it is, and
can't be bothered to d/l a 2MB manual right now.  8-)

(3) If you're doing index ops on the whole cache, it doesn't (or
shouldn't 8-) matter what order you do the indices in.  Therefore,
there's no point in having two different loops using the assembly
hackery to do one way then the other in one pass.  Just go from index
0 to index N, and unroll as much as you think is appropriate.
Given that cache _initialization_ happens approximately once during
the uptime of the system, i'd say that'd be "do one index value per
pass thru the loop."  8-)



chris