>> It's a tricky but brilliant idea CPU is allowed to run in cache
>> enabled memory region which is available without MMU intervention.
>>  It'd be p-a-i-n if CPU imposes, say, i386 way or m68k way to run.
>
> Indeed -- the direct-mapped segment on MIPS and Alpha is simply
> brilliant -- I love it.

The advantage is quite clear for kernel memory allocator.  On the
other hands, given R4000 style variable-, say power of 2, sized TLB
entry could be used for kernel text/data "hardwiring," it might have
been possible to protect kernel text area.

Tohru Nishimura
Nara Institute of Science and Technology