Subject: Re: RAMBO ASIC in R3000 Magnum
To: None <port-mips@netbsd.org>
From: Toru Nishimura <nisimura@itc.aist-nara.ac.jp>
List: port-mips
Date: 05/03/2000 17:32:11 
I wrote last 3/31 as;

> Does anyone out there know anything about how similar/differ RAMBO
> ASIC design (found in R3000 Magnum) is to "ARC chipset" (found in
> R4000 Magnum)?  I guess two are quite similar.

It turned out RAMBO ASIC has two DMA channels and a pair of
COUNT/COMPARE register for hardclock() source.  It's simpler than
DECstation IOASIC.

Tohru Nishimura