Simon Burge quoted followsing from a book;

>  Some systems use a hardware signal that indicates whether
>  the FIFO is empty, wired to an input that the CPU can sense
>  directly.  But this isn't done on any MIPS CPU to date.

Ohhh, that's exactly what DECstation 3100, 5000, DECsystem 5100 and
5400 do.

The book should be one of _must read_ references. Here is the list of
my favorites.

[1] Microprocessors - A programmer's view, R. Dewar and M. Smosna.
    ISBN 0-07-016638-2

A pretty old book discussing about i386, M68030, R3000 and others.
Yet, a remarkable book.  The authors firmly grasp the design intent
and impact of the "software managed MMU" as well as emphasizing the
significance of TLBmod. exception handling.

[2] A "Vahalia" book.  A.ka. kernel hackers' Haven.
    ISBN 0-13-1011908

It has the nice reference of how smartly R3000's tagged TLB can handle
invaliadation issues for context switch or address space protection
change.   I would want to have year 2000 edition of that...

Tohru Nishimura