Toru Nishimura wrote:

> I have a question about MIPS processor writebuffer operation.
> 
> I heard that early implementation of R2000/R3000 processors had no
> write buffer circuit inside to isolate CPU from memory subsystem.
> There were companion chips for R2000/R3000 to implement write buffer.
> Smart engineers could design their own memory control logic as a part
> of 'system controller chip' for particular computer products.   This
> is what Digital did for some of DS5000.
> 
> Newer designs of R3000 (A?) have write buffer circuit built inside
> eliminating an external logics.  Now my question is; how such the
> builtin WB can be drained?  I heard that WB drain can be done lw
> operation of a 32bit quantity in KSEG1 space.

From "See MIPS Run", p89:

	4.13.1	Implementing wbflush

        Unless you CPU is one of the peculiar type above, you can ensure
        that the write buffer is empty by performing an uncached load
        from anywhere (which will stall the CPU until the writes have
        finished and the load has finished too).  This is inefficient;
        you can minimize the overhead by loading from the fastest memory
        available to you.
            For those who never want to think about it again, a write
        to memory followed by an uncached read from the same address
        (with a `sync' in between the two if you're running on a MIPS
        III or later CPU) will flush out the write FIFO on any MIPS CPU
        built to date (and it's difficult to see how a CPU without this
        behavior could be a correct implementation).
            Some systems use a hardware signal that indicates whether
        the FIFO is empty, wired to an input that the CPU can sense
        directly.  But this isn't done on any MIPS CPU to date.

	CAUTION
            Systems often have write buffers outside the CPU.  Any bus
            or memory interface that boasts of having `write posting' as
            a feature is behaving similarly.  Write buffers outside the
            CPU can give you the same sort of trouble as those inside
            it.  Take care with your programming.

A CPU "of the peculiar type above" is "earlier 32-bit systems",
including "original R3000 hardware".

For DECstations, most of the wbflush routines are in locore.s which is
nicely provided in source form in all Ultrix distributions.

Simon.