Subject: Re: CVS commit: syssrc
To: None <nisimura@itc.aist-nara.ac.jp>
From: Noriyuki Soda <soda@sra.co.jp>
List: port-mips
Date: 03/04/2000 19:32:50
> > Modified Files:
> > syssrc/sys/arch/mips/mips: mips_machdep.c
> >
> > Log Message:
> > use callback function to set up secondary cache related things on arc.
> > XXX - perhaps it is better to separate cache related initialization
> > from mips_vector_init().
>
> Recently I reordered personal priority of mips_machdep.c rework in
> order to remove any messy #ifdefs from the file contributing more
> saner support of any funcy features found in new MIPS processors. The
> initial version for MIPS1 processors will appear soon.
Software is responsible for configuration of MIPS3_CONFIG_SC bit
(secondary cache enable). And "#ifdef pmax" of the mips_machdep.c
seems to indicate that R4000 pmax's firemware doesn't initialize this
bit. Is this right?
Or, since software is responsible for that, such firmware might be
exist.
If so, possible solutions are
1. Do not look at MIPS3_CONFIG_SC in mips_vector_init().
Make mach_init() initialize mips_L2CachePresent and
mips_L2CacheSize before calling mips_vector_init().
or
2. Continue to use MIPS3_CONFIG_SC to initialize
mips_L2CachePresent in mips_vector_init().
But make a machine dependent way to overwrite
the mips_L2CachePresent.
2a. Use callback function to set mips_L2CachePresent
like arc currently does.
(IMHO, this is not good.)
or
2b. Separete cache initialization and cache flush
function from mips_vector_init().
In this way, port dependent mach_init() function
will be changed from
mips_vector_init();
to
mips_vector_init();
mips_ConfigCache();
if (CPUISMIPS3) {
/* this is pmax case */
mips_L2CachePresent = 1;
mips_L2CacheSize = 1024 * 1024;
}
MachFlushCache();
When I wrote the cvs-commit message of mips_machdep.c, I thought about 2b.
1. seems to be reasonable, too.
But it might be problematic that cpu_arch variable is not initialized
before mips_vector_init().
For example, even if it is certain that a platform's firmware
initialize MIPS3_CONFIG_SC, mach_init() cannot call mips3_read_cache()
if it's CPU is MIPS1 architecture.
(And at that point, mach_init() cannot use cpu_arch since it is
not initialized yet.)
Which way is better?
--
soda