Subject: PR port-mips/4400: news3400 hangs up in Flush[DI]Cache
To: None <port-mips@netbsd.org>
From: Jonathan Stone <jonathan@DSG.Stanford.EDU>
List: port-mips
Date: 01/26/1999 18:40:27
What's the best way to handle all the hacky ways that pre-r3000s used
to drain the writebuffer?  The r3000 will force a writebuffer drain
anytime the CPU does an access to uncached, unmapped memory; but
different vendor's r2000 (and r2000a?) boards wire an external
writebuffer-done signal to any number of pins, at either polarity.


The specific problem in port-mips/4400, with the mips1 locore
cache-flush code is now handled by the "#ifdef pmax' lines.  
I suggested doing a mips_set_wbflush() call to fix the wbflush routines.

Should we add the same #ifdef to wbflush()? That'd make it a suitable
default wbflush() routine for all r3000 cores (which is `most' mips1
systems).

Or should we mandate that all ports do an explicit mips_set_wbflush(),
like sys/arch/pmax/pmax/dec_5100.c does?