Subject: Re: ofb proposal /testing offered
To: Michael <macallan18@earthlink.net>
From: Rudi Ludwig <rudihl@gmx.de>
List: port-macppc
Date: 01/31/2005 20:08:54
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Hello:
> The machfb driver has a list of supported chips, apparently it didn't
> like yours and refused to attach.
>
> Could you please send me the output of
> pcictl pci0 dump -d 16
please find attached file
> on your box? I have no idea how far the Rage Mobility M3 differs from
> the older Rages, the PCI config stuff may contain some hints.
As Pavel already wrote the XFree driver for this hardware is the r128.
So if it doesn't fit, don't worry, I don't need to relie on it.
XFree works for me (despite some keyboard problems)
Rudi
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PCI configuration registers:
Common header:
0x00: 0x4c461002 0x02b00087 0x03000002 0x0000ff08
Vendor Name: ATI Technologies (0x1002)
Device Name: Rage Mobility M3 (AGP) (0x4c46)
Command register: 0x0087
I/O space accesses: on
Memory space accesses: on
Bus mastering: on
Special cycles: off
MWI transactions: off
Palette snooping: off
Parity error checking: off
Address/data stepping: on
System error (SERR): off
Fast back-to-back transactions: off
Status register: 0x02b0
Capability List support: on
66 MHz capable: on
User Definable Features (UDF) support: off
Fast back-to-back capable: on
Data parity error detected: off
DEVSEL timing: medium (0x1)
Slave signaled Target Abort: off
Master received Target Abort: off
Master received Master Abort: off
Asserted System Error (SERR): off
Parity error detected: off
Class Name: display (0x03)
Subclass Name: VGA (0x00)
Interface: 0x00
Revision ID: 0x02
BIST: 0x00
Header Type: 0x00 (0x00)
Latency Timer: 0xff
Cache Line Size: 0x08
Type 0 ("normal" device) header:
0x10: 0x94000008 0x00000401 0x90000000 0x00000000
0x20: 0x00000000 0x00000000 0x00000000 0x4c461002
0x30: 0x90020000 0x00000050 0x00000000 0x00080130
Base address register at 0x10
type: 32-bit prefetchable memory
base: 0x94000000, not sized
Base address register at 0x14
type: i/o
base: 0x00000400, not sized
Base address register at 0x18
type: 32-bit nonprefetchable memory
base: 0x90000000, not sized
Base address register at 0x1c
not implemented(?)
Base address register at 0x20
not implemented(?)
Base address register at 0x24
not implemented(?)
Cardbus CIS Pointer: 0x00000000
Subsystem vendor ID: 0x1002
Subsystem ID: 0x4c46
Expansion ROM Base Address: 0x90020000
Capability list pointer: 0x50
Reserved @ 0x38: 0x00000000
Maximum Latency: 0x00
Minimum Grant: 0x08
Interrupt pin: 0x01 (pin A)
Interrupt line: 0x30
Capability register at 0x50
type: 0x02 (AGP, rev. 2.0)
Capability register at 0x5c
type: 0x01 (Power Management, rev. 1.0)
Device-dependent header:
0x40: 0x00000000 0x00000000 0x00000000 0x00000000
0x50: 0x00205c02 0x1f000203 0x00000200 0x06020001
0x60: 0x00000000 0x00000000 0x00000000 0x00000000
0x70: 0x00000000 0x00000000 0x00000000 0x00000000
0x80: 0x00000000 0x00000000 0x00000000 0x00000000
0x90: 0x00000000 0x00000000 0x00000000 0x00000000
0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
0xf0: 0x00000000 0x00000000 0x00000000 0x00000000
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