Dear list,

Around the first of the year, I reported a problem that turned out to be
in sys/arch/macppc/macppc/extintr.c.  The problem is that
if during soft interrupt handling, another soft interrupt is posted,
it would be cleared by the code at the end of the handler and lost.  Tsubai
Masanari put a fix into -current, with all the extra stuff for multiprocessing,but I was hoping that the simple fix would be pulled into the 1.5.1 release.

I have the version of the file that I am running on my ftp server in

	ftp://ftp.icompute.com/pub/donlee/extintr.c.ok

This is my version of the fix.  Others undoubtedly exist.

Without this fix, PPP has performance problems, and I suspect that
various operations in the kernel are going to have latency problems.
(I heard one report of this fixing a "slow keyboard" problem)

Anyone interested?

-dgl-


patch file:

*** /usr/src1.5/sys/arch/macppc/macppc/extintr.c        Wed Nov  1 10:26:07 2000
--- /home/user/ftp/pub/donlee/extintr.c.ok      Sat Feb 24 17:58:16 2001
***************
*** 618,623 ****
--- 618,624 ----
        int irq;
        int pcpl;
        int hwpend;
+       int softpend;
        int emsr, dmsr;
        static int processing;

***************
*** 630,636 ****
--- 631,639 ----
        asm volatile("mtmsr %0" :: "r"(dmsr));

        pcpl = splhigh();               /* Turn off all */
+       softpend = ipending & ~pcpl;    /* pending "softies" */
        hwpend = ipending & ~pcpl;      /* Do now unmasked pendings */
+       ipending &= pcpl;               /* Clear ints we're about to do */
        if (!have_openpic) {
                imen &= ~hwpend;
                enable_irq(~imen);
***************
*** 652,673 ****

        /*out32rb(INT_ENABLE_REG, ~imen);*/

!       if ((ipending & ~pcpl) & (1 << SIR_CLOCK)) {
                ipending &= ~(1 << SIR_CLOCK);
                softclock();
                intrcnt[CNT_SOFTCLOCK]++;
        }
!       if ((ipending & ~pcpl) & (1 << SIR_NET)) {
                ipending &= ~(1 << SIR_NET);
                softnet();
                intrcnt[CNT_SOFTNET]++;
        }
!       if ((ipending & ~pcpl) & (1 << SIR_SERIAL)) {
                ipending &= ~(1 << SIR_SERIAL);
                softserial();
                intrcnt[CNT_SOFTSERIAL]++;
        }
!       ipending &= pcpl;
        cpl = pcpl;     /* Don't use splx... we are here already! */
        asm volatile("mtmsr %0" :: "r"(emsr));
        processing = 0;
--- 655,676 ----

        /*out32rb(INT_ENABLE_REG, ~imen);*/

!       if (softpend & (1 << SIR_CLOCK)) {
                ipending &= ~(1 << SIR_CLOCK);
                softclock();
                intrcnt[CNT_SOFTCLOCK]++;
        }
!       if (softpend & (1 << SIR_NET)) {
                ipending &= ~(1 << SIR_NET);
                softnet();
                intrcnt[CNT_SOFTNET]++;
        }
!       if (softpend & (1 << SIR_SERIAL)) {
                ipending &= ~(1 << SIR_SERIAL);
                softserial();
                intrcnt[CNT_SOFTSERIAL]++;
        }
!
        cpl = pcpl;     /* Don't use splx... we are here already! */
        asm volatile("mtmsr %0" :: "r"(emsr));
        processing = 0;