Subject: Re: PPC assembly
To: None <port-macppc@netbsd.org>
From: Andy <andy@softbook.com>
List: port-macppc
Date: 05/08/2000 07:50:49
Thanks very much to all who responded !
I'm still unclear what is accomplished by the BAT register manipulation and
why is it done
TIA
Andy
>This snippet is from ofwboot: Locore.c
>Can somebody kindly explain what's going on here?
>I understand what the instructions do but <why> this is done ?
>Below is the code and my attempt to decipher it - along with the questions
>Sorry if some of them are clearly in RTFM category
>TIA Andy
>
>
>asm("
> .text ; what does the dot here mean?
> .globl _start ;what does .globl mean ?
>_start:
> li 8,0 ; load zero into register r8 . Why ?
> li 9,0x100 ; load 0x100 into r9 Why ?
> mtctr ; copy the contents of r9( 0x100 in this case) into
>the count register .Why
>1:
> dcbf 0,8
> ; data cache block flush - the effective addr in this case = r0 | 0 + r8 -
>what's in r0? why is this done?
>
> icbi 0,8 ;instruction cache block invalidate - the EA is
>calculated as above - again why?
> addi 8,8,0x20 ;in this case :r8 = r8+0x20 = 0x20. Correct? Why?
> bdnz 1b ; -- decrement Count Register and branch to
>location 1b if CTR is not zero. why?? What's at location 1b?
> sync ; synchronize
> isync ; instruction synchronize
>
> lis 1,stack@ha ; r1 = stack<<16 -- what does @ha mean?
> addi 1,1,stack@l ; r1 = r1 | 0 +stack - what does @l mean ?
> addi 1,1,4096 ; r1 = r1 | 0 +4096 -- ditto
> what's the effect of this ? why is it done?
>
> mfmsr 8 ;r8 = mfmsr (machine state reg)
> li 0,0 ; r0 = 0 ?
> mtmsr 0 ; msr = r0 ( or zero since we just moved 0 into r0)
> isync ' instruction sync
>
> 'why all this manipulation with the instruction BAT upper registrers?
> mtibatu 0,0
> mtibatu 1,0
> mtibatu 2,0
> mtibatu 3,0
> mtdbatu 0,0
> mtdbatu 1,0
> mtdbatu 2,0
> mtdbatu 3,0
>
> li 9,0x12 /* BATL(0, BAT_M) */
> mtibatl 0,9
> mtdbatl 0,9
> li 9,0x1ffe /* BATU(0) */
> mtibatu 0,9
> mtdbatu 0,9
> isync
>
> mtmsr 8
> isync
>
> b startup ; well this one i understand:-))
>");