Here are the technotes I was talking about:

http://developer.apple.com/technotes/hw/hw_520.html
http://developer.apple.com/technotes/hw/hw_09.html

>Macintosh bus or resource locking for NuBus access
>
>Date Written : 7/30/91
>
>Last reviewed: 8/1/92
>
>Is there a way to do Macintosh-to-NuBus access with bus or resource
>locking but without the CAS CPU operation which uses a Read-Modify-Write
>cycle?
>Does a CPU Read-Modify-Write cycle do resource locking when the CPU
>accesses NuBus?
>
>___
>
>Macintosh II CPUs perform an Attention-Resource Lock cycle as a prelude to
>Read-Modify-Write cycles to NuBus addresses. There is no other way to
>initiate bus or resource locking from the Macintosh CPU. Macintosh CPUs do
>not support locking NuBus for longer tenures.
>
>The only Read-Modify-Write instructions are TAS, CAS, and CAS2.
>
>Use of these instructions is problematic, as they may introduce timing
>problems for certain CPUs (see the Macintosh Technical Note "Macintosh
>IIfx: The
>Inside Story"), and the operand address must always be previously cached
>in the MMU address translation cache or else a bus error results. They
>must be
>used with extreme care.



--
Jude Giampaolo            'I feel better having screamed, don't you?'
jude@ktb.ee.psu.edu
jude@prozac.eeap.cwru.edu           http://prozac.eeap.cwru.edu/jude/