Subject: Re: Quadra Interrupt Handler
To: NetBsd Mailing list <port-mac68k@netbsd.org>
From: Matthew Navarre <mnavarre@home.com>
List: port-mac68k
Date: 05/25/1999 19:20:00
>On Tue, 25 May 1999, David A. Gatwood wrote:
>
>> Is anyone out there particularly familiar with the Quadras?  I'm trying to
>> figure out interrupt handling for the PowerMac (or Performa) 52/53/62/63xx
>> series, which should be closely related to some Quadra models (I have no
>> idea which ones except that it's non-DMA-capable, if that helps).  On the
[*snip*]

Frederick Bruckman wrote:
>Good luck. The PowerMac is of completely different architecture than
>the Quadras. Uh... different chip, too. 680xx's don't have registers
>for interrupts, and that's just the beginning: it's considered a CISC
>design--powerpc is RISC. You could try posting your question to the
>low-volume macppc mailing list. You might also try one of the
>comp.sys.powerpc* newsgroups.

The 5200/5260 at least are essentially Quadra 630's with a PPC accelerator.
The hardware map in Apples hardware docs for these is the same as the 630
with a PPC processor and a chip to translate between the 603/603e and the
mc68040 bus. I can't remember the url offhand but I recently found the
hardware documents for both machines on Apples web site

--
Matthew Navarre                    mnavarre@home.com
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