Howdy...  I have a patch for the ncrscsi driver that might improve its
reliability.  I was wondering if anyone is brave and willing to try it...

I will be attempting to break it on some other SCSI devices, but I ran
several punishing tests on my PB145's external drive with no failures.

To apply this patch, you will, of course, need to be compiling your own
kernels, etc.  I would really like to know how this driver does on disks
that it previously failed on.

Of course, the sbc is the driver of choice in the long run, but I would
like to remove any buglets in the ncrscsi driver that we can...

Thanks,
-allen

Index: mac68k5380.c
===================================================================
RCS file: /cvsroot/src/sys/arch/mac68k/dev/mac68k5380.c,v
retrieving revision 1.29
diff -c -r1.29 mac68k5380.c
*** mac68k5380.c	1997/02/28 15:50:50	1.29
--- mac68k5380.c	1997/04/07 12:56:04
***************
*** 430,442 ****
  		long_data = (u_int32_t *) pending_5380_data;
  
  #define R4	*long_data++ = *long_drq++
! 		while ( count >= 64 ) {
  			R4; R4; R4; R4; R4; R4; R4; R4;
  			R4; R4; R4; R4; R4; R4; R4; R4;	/* 64 */
  			count -= 64;
  		}
! 		while (count >= 4) {
! 			R4; count -= 4;
  		}
  #undef R4
  		data = (u_int8_t *) long_data;
--- 430,442 ----
  		long_data = (u_int32_t *) pending_5380_data;
  
  #define R4	*long_data++ = *long_drq++
! 		while ( count > 64 ) {
  			R4; R4; R4; R4; R4; R4; R4; R4;
  			R4; R4; R4; R4; R4; R4; R4; R4;	/* 64 */
  			count -= 64;
  		}
! 		while (count > 8) {
! 			R4; R4; count -= 8;
  		}
  #undef R4
  		data = (u_int8_t *) long_data;
***************
*** 449,454 ****
--- 449,460 ----
  		pending_5380_count -= dcount;
  		pending_5380_data += dcount;
  		}
+ 		/*
+ 		 * OK.  No bus error occurred above.  Clear the nofault flag
+ 		 * so we no longer short-circuit bus errors.
+ 		 */
+ 		nofault = (int *) 0;
+ 
  	} else {
  		int	resid;
  
***************
*** 480,492 ****
  		long_data = (u_int32_t *) pending_5380_data;
  
  #define W4	*long_drq++ = *long_data++
! 		while ( count >= 64 ) {
  			W4; W4; W4; W4; W4; W4; W4; W4;
  			W4; W4; W4; W4; W4; W4; W4; W4; /*  64 */
  			count -= 64;
  		}
! 		while (count >= 4) {
! 			W4; count -= 4;
  		}
  #undef W4
  		data = (u_int8_t *) long_data;
--- 486,499 ----
  		long_data = (u_int32_t *) pending_5380_data;
  
  #define W4	*long_drq++ = *long_data++
! 		while ( count > 64 ) {
  			W4; W4; W4; W4; W4; W4; W4; W4;
  			W4; W4; W4; W4; W4; W4; W4; W4; /*  64 */
  			count -= 64;
  		}
! 		while ( count > 8 ) {
! 			W4; W4;
! 			count -= 8;
  		}
  #undef W4
  		data = (u_int8_t *) long_data;
***************
*** 499,519 ****
  		pending_5380_count -= dcount;
  		pending_5380_data += dcount;
  		}
  		PID("write complete");
  
  		drq = (volatile u_int8_t *) ncr_5380_with_drq;
  		tmp_data = *drq;
  
! 		PID("read a byte?");
! 
! 		nofault = (int *) 0;
  	}
- 
- 	/*
- 	 * OK.  No bus error occurred above.  Clear the nofault flag
- 	 * so we no longer short-circuit bus errors.
- 	 */
- 	nofault = (int *) 0;
  
  	PID("end drq");
  	return;
--- 506,525 ----
  		pending_5380_count -= dcount;
  		pending_5380_data += dcount;
  		}
+ 
  		PID("write complete");
  
+ 		/*
+ 		 * OK.  No bus error occurred above.  Clear the nofault flag
+ 		 * so we no longer short-circuit bus errors.
+ 		 */
+ 		nofault = (int *) 0;
+ 
  		drq = (volatile u_int8_t *) ncr_5380_with_drq;
  		tmp_data = *drq;
  
! 		PID("read a byte to force a phase change");
  	}
  
  	PID("end drq");
  	return;