>Rick C. Petty wrote:
>>
>> On Mon, 5 Aug 1996, weripp wrote:
>>
>> > Does anybody have the machine language instruction syntax for the pmove
>> > instruction? I'm finnally trying to get NetBSD to run on my IIsi with the
>> > DayStar 40MHz 68040. The kernel is dying in the boot after disabling the
>>
>> First, PMOVE is an 030 command.  According to my Motorola
>>reference,....<snip>
>> What version of MacsBug?
>
>It's close to current - thanks for reminding me, I'll grab whatever's
>current now...
>
>> > Also, does anyone know of any doco on the '040 MMU? Diffs from the '030
>> > MMU? etc.
>>
>> >From table 3-13 (same reference, I paid $3.45 for this reference, by the
>> way, and I use it more than my $80 M68k book!):
>>
>> [ it looks like they just differ on instruction sets... ]
>>         MC688851:  PBcc, PDBcc, PFLUSHA, PFLUSHS, FPLUSHR, PLOAD, PMOVE,
>> PRESTORE, PSAVE, PScc, PTEST, PTRAPcc
>>         MC68030:   PFLUSHA, PLOAD, PMOVE, PTEST
>>         MC68040:   PFLUSHA, PFLUSH, PFLUSHN, PFLUSHAN, PTEST
>>
>> Need any more than that, let me know.  ;)
>
>Looks like a good reference!
>Basically, I'd like to manipulate (read/modify) the MMU registers on the
>'040. All the resources I have on my book self don't mention it unforunately.
>Thanks to Christopher R. Bowman, it looks like the 040 MMU uses movec with a
>standard instruction syntax, which should get me started in the right
>direction.
>
>Christopher, in your message, you quoted the register codings for ITT0,
>ITT1, DTT0, DTT1 and TC, which are straight from locore.s. Do you happen to
>know the codings for the CRP, SRP, URP etc (some of those might be wrong,
>all my info is miles away)?
>
>Thanks for all the replies, guys! Four replys in two hours - if only all
>help could come that fast! If uni and work doesn't bog me down, I might
>get this working yet!

Control Register Field

HEX     Control Register

MC68010/MC68020/MC68030/MC68040/CPU32
------------------------------
000     Source Function Code (SFC)
001     Destination Function Code (DFC)
800     User STack Pointer (USP)
801     Vector Base Register (VBR)

MC68020/MC68030/MC68040
------------------------------
002     Cache Control Register (CACR)
802     Cache Adress Register (CAAR)
803     Master Stack Pointer (MSP)
804     Interrupt Stack Pointer (ISP)

MC68040
------------------------------
003     MMU Translation Control Register (TC)
004     Instruction Transparent Translation Register 0 (ITT0)
005     Instruction Transparent Translation Register 1 (ITT1)
006     Data Transparent Translation Register 0 (ITT0)
007     Data Transparent Translation Register 1 (ITT1)
805     MMU Status Register (MMUSR)
806     User Root Pointer (URP)
807     Supervisior Root Pointer (SRP)

---------
Christopher R. Bowman
crb@eng.umd.edu
My home page