> > Also, how is the cache told not to cache IO addresses?
> 
> By bits in the page table.  There are "cache mode" bits and these are
> set to "cache-inhibit" for the I/O space (see pmap_bootstrap.c).

Doh! Poorly worded question again! I really was wondering about the
external cache. Or does it converse with the MMU-part of the
CPU, and thus get access to these page table bits?

Take care,

Bill