> 
> > I never understood why cache flush is needed at all.  Any secondary
> > cache for 030 works with the physical address which makes (at least
> > seems to me) it unnecessary to flush it when kernel switches context.
> 
> Think on it a bit longer.  Consider the following scenario:
> 	Process A stores something in the page at virtual address 0 at
> 		physical address 0x00040000
> 	Process B is switched in and pages in virtual address 0x10000 at
> 		physical address 0x00040000
> If the caches aren't flushed, process B could see the cached contents
> from process A's virtual address 0.

If we used true DMA, I'd agree. But aren't we doing pseudo DMA?
Thus all data went through the CPU, so the cache should have
seen Process B get paged in, as the CPU did it?

Also, how is the cache told not to cache IO addresses?

Take care,

Bill