On Sat, Jun 03, 2000 at 03:42:55PM +0100, David Brownlee wrote:
> On Mon, 15 May 2000, Ignatios Souvatzis wrote:
> 
> > On Mon, May 15, 2000 at 12:29:47AM -0400, Kevin P. Neal wrote:
> > > On Sun, May 14, 2000 at 06:37:53PM -0700, Jason R Thorpe wrote:
> > > > Do the systems that have problems with `tas' also have problems with
> > > > `cas'?  If `cas' is okay, I can write a version that uses `cas' (tho
> > > > I think it might be one or two instructions longer :-)
> > > 
> > > I think the restriction, at least on the Amiga, was that no instruction
> > > should be used that used the "special read-modify-write bus cycle."
> > 
> > Yes. This is correct. For _the_ Amiga. (later called Amiga 1000), which has
> > only chipmem. (that is, memory controlled by the Fancy Amiga DMA Engine).
> > Machines with seperated fastmem and chipmem (e.g. any with cpu accellerators
> > that also provide memory, and A3000 and A4000 (and the DraCo, which has no
> > "real" chipmem) are safe as long as fastmem ist used.
> 
> 	Would it make sense to leave this as a compile time option, so
> 	specifically targetted kernels can take advantage of tas where
> 	possible?

I completely lost track as to what the intended use of this is. But:

- there probably is no difference between cas and tas... the excternal bus
  cycles are the same

- you have to make sure to longword-align the target variables. Getting a 
  page fault inside the variable is a bad idea, and even worse on M68060. 
  Actually, this may only apply to cas.

- do not use CAS2 #if defined(M68060).

- some Zorro II memory boards do not support RMW either, so Amiga 2000 might
  be a serious problem.

- if TAS is ok (and we're not using multi-CPU machines), I think BSET can 
  be substituted...

Regards,
	-is