On Sat, 18 Jan 1997 18:03:19 -0500 (EST) 
 der Mouse <mouse@Holo.Rodents.Montreal.QC.CA> wrote:

 > > So, gcc writes code in the stack and executes it?
 > > Oh, my gosh... how nauseating...
 > 
 > But pretty much unavoidable, if you're going to do nested functions.

...so... This came up with the MIPS some time ago...

If someone would like to draw up a design (and implementation :-) of
a cache manipulation API for userland, I think its someting that
ought to be in the tree...

IRIX, for exmple, has:

	cachectl(2) - mark pages cacheable or uncacheable

		#include <sys/cachectl.h>
		int cachectl (void *addr, int nbytes, int op);

		The op parameter may be one of:

		CACHEABLE        Make the indicated pages cacheable
		UNCACHEABLE      Make the indicated pages uncacheable

	cacheflush(2) - flush contents of instruction and/or data cache

		#include <sys/cachectl.h>
		int cacheflush (void *addr, int nbytes, int cache);

		The cache parameter may be one of:

		ICACHE           Flush only the instruction cache
		DCACHE           Flush only the data cache
		BCACHE           Flush both the instruction and the
		                 data cache

I don't see any reason why these have to be real system calls in
our world... they could be, for example, fast trap vectors...

I've put Jonathan Stone on the CC, since he mentioned some standard
for MIPS CPUs in this area... and, I think I remember him indicating
to me that the MIPS caches can only be flushed in supervisor mode.
Please, by all means, correct me if I'm mistaken.

Jason R. Thorpe                                       thorpej@nas.nasa.gov
NASA Ames Research Center                               Home: 408.866.1912
NAS: M/S 258-6                                          Work: 415.604.0935
Moffett Field, CA 94035                                Pager: 415.428.6939