> From: Leo Weppelman <leo@wau.mis.ah.nl>
> Date: Mon, 9 Sep 1996 10:40:59 +0200 (MET DST)

[...]
> As I pointed out in my original post, the compile generates a 3 instruction
> sequence for those operations (when <var> is volatile). This sequence
> is vulnerable for device interrupts. This means that if you are manipulating
> say interrupt mask-registers in code running at spl0 and in an interrupt
> handler, you should either:
>     1- guard the operation with spl-calls
>     2- make sure the operation is done within a single instruction
> or you may loose. Because I think the first option is an overkill, the
> macro's provide the second option.
> 
> Leo.

There is another way to avoid spl* calls in these situations:
All you need to do is store your binary flags each in a char
variable.  Take your "ssir" variable for example.  Instead of
using three bits in one char, you could use three chars, i.e.

	union {
		int ssir_int;
		char ssir_c[4];
	} ssir;

Then you can "set a bit" by just slamming 1 into one of the
char slots.  In this case, you can even check four values at
one time in the service routine (though that will need an spl).

As another example, the flags used to communicate between the
hard and soft interrupt routines in the z8530 driver are all
of the "one boolean per char" variety so that they can be set
without needing spl* calls (because it's just a write).

I'd suggest examining whether this technique might allow you
to avoid machine-dependent tricks as well as avoid spl* calls.

Gordon