On Fri, Aug 17, 2007 at 03:48:36PM -0500, David Young wrote:
> elan_intr: enter  
> elan_intr: memory rd 00000470 master abort
> cmos: attached.
> 
> Does anyone know where that read comes from?  I have not found it by
> grepping the sources.
> 
> According to
> <http://heim.ifi.uio.no/~stanisls/helppc/bios_data_area.html>, at 0x470
> is the "clock rollover flag" in the BIOS memory area, at 0x471 is the
> "BIOS break flag," and at 0x472 is the "soft reset flag".
> 
> I suppose it is possible that either the BIOS, the 1st- or 2nd-stage
> bootloader read 0x470, and the CPU interrupts us later.  The kernel
> installs its interrupt handler for the PCI exceptions way before the
> exception occurs, however.

When do interrupts actually get enabled?
ISTR it is quite late on, the bug/fix I did to stop gcc4 optimising away the
lidt might be informative.

Also there might be something odd going on with physical v virtual
addresses and the DRAM interface.
The DRAM banks are movable - otherwise they could never be contiguous.
And usually 0x470 wouldn't go to the PCI bus at all....

	David

-- 
David Laight: david@l8s.co.uk