Subject: Re: AMD cpu features small update for RDTSCP instruction
To: Nicolas Joly <njoly@pasteur.fr>
From: Juan RP <juan@xtrarom.org>
List: port-i386
Date: 07/11/2007 00:37:22
On Fri, 6 Jul 2007 16:26:55 +0200
Nicolas Joly <njoly@pasteur.fr> wrote:
>
> Hi,
>
> Here is a small patch to update AMD cpu specific features for RDTSCP
> instruction; found, at least, on `Dual-Core AMD Opteron Processor 8218'.
>
> Support for this instruction can be checked on register edx bit 27
> for CPUID 0x80000001.
>
> cpu0: Dual-Core AMD Opteron(tm) Processor 8218, 2612.17 MHz
> cpu0: features: ffdbfbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR>
> cpu0: features: ffdbfbff<PGE,MCA,CMOV,PAT,PSE36,MPC,NOX,MMXX,MMX>
> cpu0: features: ffdbfbff<FXSR,SSE,SSE2,RDTSCP,HTT,LONG,3DNOW2,3DNOW>
> cpu0: features2: 2001<SSE3>
> cpu0: I-cache 64 KB 64B/line 2-way, D-cache 64 KB 64B/line 2-way
> cpu0: L2 cache 1 MB 64B/line 16-way
> cpu0: ITLB 32 4 KB entries fully associative, 8 4 MB entries fully
> associative cpu0: DTLB 32 4 KB entries fully associative, 8 4 MB entries
> fully associative
Please commit.
--
Juan Romero Pardines - The NetBSD Project
http://plog.xtrarom.org - NetBSD/pkgsrc news in Spanish