Subject: Re: Need help with timecounter/todr (MI cycle counters like x86 TSC
To: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
From: Frank Kardel <kardel@netbsd.org>
List: port-i386
Date: 07/08/2007 13:16:47
Izumi Tsutsui wrote:
> In article <46908B5C.7020306@netbsd.org>
> kardel@NetBSD.org wrote:
>
>   
>> I can check x86 again on AMD X2 most likely next WE.
>>     
>
> Thanks, I've also put compiled GENERIC.MP kernels:
> http://www.ceres.dti.ne.jp/~tsutsui/netbsd/netbsd-alpha-GENERIC.MP-cctr-20070707.gz
> http://www.ceres.dti.ne.jp/~tsutsui/netbsd/netbsd-amd64-GENERIC.MP-cctr-20070707.gz
> http://www.ceres.dti.ne.jp/~tsutsui/netbsd/netbsd-i386-GENERIC.MP-cctr-20070707.gz
> http://www.ceres.dti.ne.jp/~tsutsui/netbsd/alpha-cctr-todr-20070707.diff
>
>   
>> Maybe we find the problem in the cctr code that leads to
>> backward time steps on MP systems detected by
>> regress/sys/kern/time.
>>     
>
> I'm not familiar with MP issue, but splhigh()/splx() pairs should
> be replaced with some proper locks?
>   
Actually locks are for mp-coordination. But here you need to manipulate 
a data structure where you
don't want to be interrupted when updating ci->cc_* - especially you 
don't want to have
anything reading the time (and thus accessing ci->cc_*) during the update.
> ---
> Izumi Tsutsui
>   
Frank