The patch prints cache information of CeleronM (600MHz,
no processor number).  Do you review it, please?
If there is no objection, I'll commit it next weekend.

--- sys/arch/i386/i386/identcpu.c	19 Jun 2007 14:16:56 -0000	1.67
+++ sys/arch/i386/i386/identcpu.c	24 Jun 2007 01:41:14 -0000
@@ -62,8 +62,10 @@
 static const struct x86_cache_info
 intel_cpuid_cache_info[] = {
 	{ CAI_ITLB, 	0x01,	 4, 32,        4 * 1024, NULL },
+	{ CAI_ITLB,     0xb0,    4,128,        4 * 1024, NULL },
 	{ CAI_ITLB2, 	0x02, 0xff,  2, 4 * 1024 * 1024, NULL },
 	{ CAI_DTLB, 	0x03,    4, 64,        4 * 1024, NULL },
+	{ CAI_DTLB,     0xb3,    4,128,        4 * 1024, NULL },
 	{ CAI_DTLB2,    0x04,    4,  8, 4 * 1024 * 1024, NULL },
 	{ CAI_ITLB,     0x50, 0xff, 64,        4 * 1024, "4K/4M: 64 entries" },
 	{ CAI_ITLB,     0x51, 0xff, 64,        4 * 1024, "4K/4M: 128 entries" },
@@ -99,6 +101,7 @@
 	{ CAI_L2CACHE,  0x83,  8,      512 * 1024, 32, NULL },
 	{ CAI_L2CACHE,  0x84,  8, 1 * 1024 * 1024, 32, NULL },
 	{ CAI_L2CACHE,  0x85,  8, 2 * 1024 * 1024, 32, NULL },
+	{ CAI_L2CACHE,  0x86,  4,      512 * 1024, 64, NULL },
 	{ 0,               0,  0,	        0,  0, NULL },
 };
 

Here is a dmesg (though it's on NetBSD 3.0.2).
 
cpu0 at mainbus0: (uniprocessor)
cpu0: Intel Pentium M (Banias) (686-class), 599.96 MHz, id 0x695
cpu0: features a7e9f9bf<FPU,VME,DE,PSE,TSC,MSR,MCE,CX8,SEP,MTRR>
cpu0: features a7e9f9bf<PGE,MCA,CMOV,PAT,CFLUSH,DS,ACPI,MMX>
cpu0: features a7e9f9bf<FXSR,SSE,SSE2,TM,SBF>
cpu0: "Intel(R) Celeron(R) M processor          600MHz"
cpu0: I-cache 32 KB 64B/line 8-way, D-cache 32 KB 64B/line 8-way
cpu0: L2 cache 512 KB 64B/line 4-way
cpu0: ITLB 128 4 KB entries 4-way, 2 4 MB entries fully associative
cpu0: DTLB 128 4 KB entries 4-way, 8 4 MB entries 4-way
cpu0: running without thermal monitor!
cpu0: 32 page colors
---
Tetsuya Isaki <isaki@par.odn.ne.jp / isaki@NetBSD.org>