Subject: Re: Trouble with NetBSD 3.0 and Cisco Aironet 350
To: Victor Lagerkvist <plumsaren@gmail.com>
From: Rui Paulo <rpaulo@fnop.net>
List: port-i386
Date: 05/20/2006 19:39:26
On 2006.05.20 15:15:11 +0100, Rui Paulo wrote:
> On 2006.05.20 15:28:20 +0200, Victor Lagerkvist wrote:
> > Greetings, I'm having trouble getting NetBSD to work correctly on my IBM 
> > ThinkPad R40 with a Cisco Aironet 350 mini-PCI wireless card. When 
> > running "ifconfig -a" everything that appears is the regular wired card, and 
> > during boot time the following error message appears (full dmesg included as 
> > a attachment):
> > 
> > cbb0 at pci2 dev 0 function 0: Texas Instruments PCI1510 PCI-CardBus Bridge 
> > (rev. 0x00)
> > Aironet Wireless Communications MPI350 Mini-PCI Wireless LAN Adapter 
> > (miscellaneous network) at pci2 dev 2 function 0 not configured
> > 
> > As far as I know, the an(4)-driver that supposedly supports this card is 
> > included in the GENERIC-kernel that I use, so as a new NetBSD user I feel a 
> > little lost... Any tips or suggestions on how I should proceed would be 
> > greatly appreciated.
> 
> The Aironet MPI350 is not being recognized by the an(4) device driver.

This is not yet complete, but what happens with this patch ?

Index: sys/dev/pci/if_an_pci.c
===================================================================
RCS file: /cvsroot/src/sys/dev/pci/if_an_pci.c,v
retrieving revision 1.19
diff -u -p -r1.19 if_an_pci.c
--- sys/dev/pci/if_an_pci.c	11 Dec 2005 12:22:49 -0000	1.19
+++ sys/dev/pci/if_an_pci.c	20 May 2006 18:30:18 -0000
@@ -100,6 +100,7 @@ static const struct an_pci_product {
 	{ PCI_VENDOR_AIRONET,		PCI_PRODUCT_AIRONET_PC4500 },
 	{ PCI_VENDOR_AIRONET,		PCI_PRODUCT_AIRONET_PC4800 },
 	{ PCI_VENDOR_AIRONET,		PCI_PRODUCT_AIRONET_PCI350 },
+	{ PCI_VENDOR_AIRONET,		PCI_PRODUCT_AIRONET_MPI350 },
 	{ 0,				0			   }
 };
 
@@ -133,6 +134,9 @@ an_pci_attach(struct device *parent, str
         pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo));
         aprint_normal(": %s\n", devinfo);
 
+	if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_AIRONET_MPI350)
+		sc->sc_mpi350 = 1;
+
         /* Map I/O registers */
         if (pci_mapreg_map(pa, AN_PCI_IOBA, PCI_MAPREG_TYPE_IO, 0,
 	    &sc->sc_iot, &sc->sc_ioh, NULL, NULL) != 0) {
Index: sys/dev/ic/anreg.h
===================================================================
RCS file: /cvsroot/src/sys/dev/ic/anreg.h,v
retrieving revision 1.13
diff -u -p -r1.13 anreg.h
--- sys/dev/ic/anreg.h	19 Feb 2006 08:20:46 -0000	1.13
+++ sys/dev/ic/anreg.h	20 May 2006 18:30:19 -0000
@@ -46,15 +46,15 @@
  */
 
 /* Hermes command/status registers. */
-#define AN_COMMAND		0x00
-#define AN_PARAM0		0x02
-#define AN_PARAM1		0x04
-#define AN_PARAM2		0x06
-#define AN_STATUS		0x08
-#define AN_RESP0		0x0A
-#define AN_RESP1		0x0C
-#define AN_RESP2		0x0E
-#define AN_LINKSTAT		0x10
+#define AN_COMMAND		(sc->sc_mpi350 ? 0x00 : 0x00)
+#define AN_PARAM0		(sc->sc_mpi350 ? 0x04 : 0x02)
+#define AN_PARAM1		(sc->sc_mpi350 ? 0x08 : 0x04)
+#define AN_PARAM2		(sc->sc_mpi350 ? 0x0c : 0x06)
+#define AN_STATUS		(sc->sc_mpi350 ? 0x10 : 0x08)
+#define AN_RESP0		(sc->sc_mpi350 ? 0x14 : 0x0A)
+#define AN_RESP1		(sc->sc_mpi350 ? 0x18 : 0x0C)
+#define AN_RESP2		(sc->sc_mpi350 ? 0x1c : 0x0E)
+#define AN_LINKSTAT		(sc->sc_mpi350 ? 0x20 : 0x10)
 
 /* Command register */
 #define AN_CMD_BUSY		0x8000 /* busy bit */
@@ -85,6 +85,70 @@
 #define AN_CMD_SAVECFG		0x0108
 
 /*
+ * MPI 350 DMA descriptor information
+ */
+#define AN_DESCRIPTOR_TX	0x01
+#define AN_DESCRIPTOR_RX	0x02
+#define AN_DESCRIPTOR_TXCMP	0x04
+#define AN_DESCRIPTOR_HOSTWRITE	0x08
+#define AN_DESCRIPTOR_HOSTREAD	0x10
+#define AN_DESCRIPTOR_HOSTRW	0x20
+
+#define AN_MAX_RX_DESC 1
+#define AN_MAX_TX_DESC 1
+#define AN_HOSTBUFSIZ 1840
+
+struct an_card_rid_desc
+{
+	unsigned	an_rid:16;
+	unsigned	an_len:15;
+	unsigned	an_valid:1;
+	u_int64_t	an_phys;
+};
+
+struct an_card_rx_desc
+{
+	unsigned	an_ctrl:15;
+	unsigned	an_done:1;
+	unsigned	an_len:15;
+	unsigned	an_valid:1;
+	u_int64_t	an_phys;
+};
+
+struct an_card_tx_desc
+{
+	unsigned	an_offset:15;
+	unsigned	an_eoc:1;
+	unsigned	an_len:15;
+	unsigned	an_valid:1;
+	u_int64_t	an_phys;
+};
+
+#define AN_RID_BUFFER_SIZE	AN_MAX_DATALEN
+#define AN_RX_BUFFER_SIZE	AN_HOSTBUFSIZ
+#define AN_TX_BUFFER_SIZE	AN_HOSTBUFSIZ
+/*#define AN_HOST_DESC_OFFSET	0xC sort of works */
+#define AN_HOST_DESC_OFFSET	0x800
+#define AN_RX_DESC_OFFSET  (AN_HOST_DESC_OFFSET + \
+    sizeof(struct an_card_rid_desc))
+#define AN_TX_DESC_OFFSET (AN_RX_DESC_OFFSET + \
+    (AN_MAX_RX_DESC * sizeof(struct an_card_rx_desc)))
+
+struct an_command {
+	u_int16_t	an_cmd;
+	u_int16_t	an_parm0;
+	u_int16_t	an_parm1;
+	u_int16_t	an_parm2;
+};
+
+struct an_reply {
+	u_int16_t	an_status;
+	u_int16_t	an_resp0;
+	u_int16_t	an_resp1;
+	u_int16_t	an_resp2;
+};
+
+/*
  * Reclaim qualifier bit, applicable to the
  * TX command.
  */
@@ -123,7 +187,7 @@
 /* memory handle management registers */
 #define AN_RX_FID		0x20
 #define AN_ALLOC_FID		0x22
-#define AN_TX_CMP_FID		0x24
+#define AN_TX_CMP_FID		(sc->sc_mpi350 ? 0x1a : 0x24)
 
 /*
  * Buffer Access Path (BAP) registers.
@@ -148,9 +212,11 @@
 #define AN_OFF_DATAOFF		0x0FFF
 
 /* Event registers */
-#define AN_EVENT_STAT		0x30	/* Event status */
-#define AN_INT_EN		0x32	/* Interrupt enable/disable */
-#define AN_EVENT_ACK		0x34	/* Ack event */
+/* Event registers */
+#define AN_EVENT_STAT		(sc->sc_mpi350 ? 0x60 : 0x30) /* Event status */
+#define AN_INT_EN		(sc->sc_mpi350 ? 0x64 : 0x32) /* Interrupt enab/
+								 disable */
+#define AN_EVENT_ACK		(sc->sc_mpi350 ? 0x68 : 0x34) /* Ack event */
 
 /* Events */
 #define AN_EV_CLR_STUCK_BUSY	0x4000	/* clear stuck busy bit */
@@ -166,10 +232,10 @@
 #define AN_EV_RX		0x0001	/* async rx completed */
 
 /* Host software registers */
-#define AN_SW0			0x28
-#define AN_SW1			0x2A
-#define AN_SW2			0x2C
-#define AN_SW3			0x2E
+#define AN_SW0			(sc->sc_mpi350 ? 0x50 : 0x28)
+#define AN_SW1			(sc->sc_mpi350 ? 0x54 : 0x2A)
+#define AN_SW2			(sc->sc_mpi350 ? 0x58 : 0x2C)
+#define AN_SW3			(sc->sc_mpi350 ? 0x5c : 0x2E)
 
 #define AN_CNTL			0x14
 
Index: sys/dev/ic/anvar.h
===================================================================
RCS file: /cvsroot/src/sys/dev/ic/anvar.h,v
retrieving revision 1.13
diff -u -p -r1.13 anvar.h
--- sys/dev/ic/anvar.h	19 Feb 2006 08:20:02 -0000	1.13
+++ sys/dev/ic/anvar.h	20 May 2006 18:30:19 -0000
@@ -117,6 +117,8 @@ struct an_softc	{
 	int			sc_invalid;
 	int			sc_attached;
 
+	int			sc_mpi350;
+
 	int			sc_bap_id;
 	int			sc_bap_off;
 

	-- Rui Paulo