In message "Re: CVS commit: src/sys/dev/pci"
    on 03/11/03, Johan Danielsson <joda@pdc.kth.se> writes:
> > With such boards, the result of auich_calibrate() was not stable.
> 
> But how unstable? I haven't noticed any real problem. Currently I have
> an error of less than 0.02%.

I had an error of less than 100Hz.

The auich_calibrate() seems to return a higher rate for a higher
clock CPU/bus board.  With a Pentium 4 2.8GHz machine, it
reutrns about 49500Hz though the actual rate is 48000Hz.
Actually rounding off to the nearest 1000 is not sufficient.

I'd like to know 
 - whether the current code is sufficient, and
 - examples of overclocked rate.

-- 
TAMURA Kent <kent2003@hauN.org> <kent@netbsd.org>