seebs@plethora.net (Peter Seebach) writes:

> I know that, on some systems, a P4 with hyperthreading looks like two
> processors.  Should this be working on NetBSD-current?  Is it useful?
> I know it works in BSD/OS, and I also hear that the net performance gain
> is typically negative.  :)

Under -current, P4s with hyperthreading show up as multiple CPUs. My
Dell PWS 650 (dual P4 Xeon) shows up as:

cpu0 at mainbus0: apid 0 (boot processor)
cpu0: Intel Pentium 4 (686-class), 2392.13 MHz, id 0xf27
cpu0: features bfebfbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR>
cpu0: features bfebfbff<PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX>
cpu0: features bfebfbff<FXSR,SSE,SSE2,SS,HTT,TM,SBF>
cpu0: I-cache 12K uOp cache 8-way, D-cache 8 KB 64b/line 4-way
cpu0: L2 cache 512 KB 64b/line 8-way
cpu0: ITLB 4K/4M: 64 entries
cpu0: DTLB 4K/4M: 64 entries
cpu0: calibrating local timer
cpu0: apic clock running at 132 MHz
cpu0: 16 page colors
cpu0: kstack at 0xe3ec8000 for 16384 bytes
cpu0: idle pcb at 0xe3ec8000, idle sp at 0xe3ecbf98
cpu1 at mainbus0: apid 6 (application processor)
cpu1: starting
cpu1: Intel Pentium 4 (686-class), 2392.04 MHz, id 0xf27
cpu1: features bfebfbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR>
cpu1: features bfebfbff<PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX>
cpu1: features bfebfbff<FXSR,SSE,SSE2,SS,HTT,TM,SBF>
cpu1: I-cache 12K uOp cache 8-way, D-cache 8 KB 64b/line 4-way
cpu1: L2 cache 512 KB 64b/line 8-way
cpu1: ITLB 4K/4M: 64 entries
cpu1: DTLB 4K/4M: 64 entries
cpu1: kstack at 0xe3ed4000 for 16384 bytes
cpu1: idle pcb at 0xe3ed4000, idle sp at 0xe3ed7f98
cpu2 at mainbus0: apid 1 (application processor)
cpu2: starting
cpu2: Intel Pentium 4 (686-class), 2392.04 MHz, id 0xf27
cpu2: features bfebfbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR>
cpu2: features bfebfbff<PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX>
cpu2: features bfebfbff<FXSR,SSE,SSE2,SS,HTT,TM,SBF>
cpu2: I-cache 12K uOp cache 8-way, D-cache 8 KB 64b/line 4-way
cpu2: L2 cache 512 KB 64b/line 8-way
cpu2: ITLB 4K/4M: 64 entries
cpu2: DTLB 4K/4M: 64 entries
cpu2: kstack at 0xe3ef0000 for 16384 bytes
cpu2: idle pcb at 0xe3ef0000, idle sp at 0xe3ef3f98
cpu3 at mainbus0: apid 7 (application processor)
cpu3: starting
cpu3: Intel Pentium 4 (686-class), 2392.04 MHz, id 0xf27
cpu3: features bfebfbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR>
cpu3: features bfebfbff<PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX>
cpu3: features bfebfbff<FXSR,SSE,SSE2,SS,HTT,TM,SBF>
cpu3: I-cache 12K uOp cache 8-way, D-cache 8 KB 64b/line 4-way
cpu3: L2 cache 512 KB 64b/line 8-way
cpu3: ITLB 4K/4M: 64 entries
cpu3: DTLB 4K/4M: 64 entries
cpu3: kstack at 0xe3f0c000 for 16384 bytes
cpu3: idle pcb at 0xe3f0c000, idle sp at 0xe3f0ff98

... where cpu0/cpu1 is one core, and cpu2/cpu3 is another core.

I haven't run any numbers yet to see if it's a net benefit to have HT
enabled.

        - Nathan