Hi,

       From: Michael Graff <explorer@flame.org>
    Subject: Re: Trouble with laptop devices and interrupts
      Date : Mon, 09 Dec 2002 13:13:26 -0800
 Message-ID: <v6ptsagakp.fsf@kechara.flame.org>

$ Here's the dmesg showing PCIINTR_DEBUG enabled.
$ 
$ PCI Interrupt Router at 000:31:0 (Intel 82371FB PCI-to-ISA Bridge (PIIX))
$ PIR Entry 1:
$ 	Bus: 2  Device: 5
$ 		INTA: link 0x69 bitmap 0x0008
$ 		INTB: link 0x00 bitmap 0xdef8
$ 		INTC: link 0x00 bitmap 0xdef8
$ 		INTD: link 0x00 bitmap 0xdef8
$ PIR Entry 2:
$ 	Bus: 2  Device: 8
$ 		INTA: link 0x68 bitmap 0x0200
$ 		INTB: link 0x00 bitmap 0xdef8
$ 		INTC: link 0x00 bitmap 0xdef8
$ 		INTD: link 0x00 bitmap 0xdef8
$ PIR Entry 5:
$ 	Bus: 0  Device: 29
$ 		INTA: link 0x60 bitmap 0x0200
$ 		INTB: link 0x63 bitmap 0x0200
$ 		INTC: link 0x00 bitmap 0xdef8
$ 		INTD: link 0x00 bitmap 0xdef8
$ PIR Entry 6:
$ 	Bus: 0  Device: 1
$ 		INTA: link 0x60 bitmap 0x0200
$ 		INTB: link 0x00 bitmap 0xdef8
$ 		INTC: link 0x00 bitmap 0xdef8
$ 		INTD: link 0x00 bitmap 0xdef8
$ pciintr_link_fixup: PIRQ 0x00 already connected to IRQ 9
$ pciintr_link_fixup: PIRQ 0x03 already connected to IRQ 9
$ pciintr_link_route: route of PIRQ 0x00 -> IRQ 9 preserved BIOS setting
$ pciintr_link_route: route of PIRQ 0x03 -> IRQ 9 preserved BIOS setting
$ - ------------------------------------------
$   device vendor product pin PIRQ IRQ stage
$ - ------------------------------------------
$ 000:29:0 0x8086 0x2482   A  0x00   9  0    already assigned
$ 000:29:1 0x8086 0x2484   B  0x03   9  0    already assigned
$ pciintr_header_fixup: no entry for link 0x69 (2:5:0:A)
$ pciintr_header_fixup: no entry for link 0x68 (2:8:0:A)
$ - ------------------------------------------

The value of link should be "0x01, 0x02, 0x03, 0x04", or
"0x60, 0x61, 0x62, 0x63".

How about this? It will map below:

    link: 0x60 --> clink: 0x00
    link: 0x63 --> clink: 0x03
    link: 0x68 --> clink: 0x01
    link: 0x69 --> clink: 0x02 

Regards!
---
 Masanori Kanaoka	kanaoka@ann.hi-ho.ne.jp

Index: piix.c
===================================================================
RCS file: /ftp/cvs/syssrc/sys/arch/i386/pci/piix.c,v
retrieving revision 1.3
diff -u -r1.3 piix.c
--- piix.c      15 Nov 2001 07:03:35 -0000      1.3
+++ piix.c      9 Dec 2002 22:29:54 -0000
@@ -159,6 +159,16 @@
                return (0);
        }
 
+       /* 
+        * XXX Pattern 3: configuration register offset 1
+        *  Some BIOS return 0x68, 0x69
+        */
+       if (link >= 0x68 && link <= 0x69) {
+               *clinkp = link - 0x67;
+               DPRINTF(("PIRQ %d (register offset 1)\n", *clinkp));
+               return (0);
+       }
+
        DPRINTF(("bogus IRQ selection source\n"));
        return (1);
 }