>> Wed, 06 Feb 2002 00:47:04 +0900 (JST), URA Hiroshi <ura@hiru.aoba.yokohama.jp> said:

> The Audio Codec '97 rev.2.2 (*) is written as follows:
> 
>     VRA=1 enables Variable Rate Audio mode (VRA use sample ate control
>     Registers 2C-32h). Open reset, 
>     When VRA  is set to 0 the registers are forced to
>     BB80h(48kHz)

Oops. Some sentences are lacked. The right is that:

    VRA=1 enables Variable Rate Audio mode (VRA use sample rate control
    Registers 2C-32h). Opon reset, the audio sample rate registers
    default to 48kHz, and VRA=0. When VRA is set to 0 the registers are
    forced to BB80h(48kHz) because that is the onl rate supported, and
    any values previously written to these registers are lost.
 
>   *) ftp://download.intel.com/ial/scalableplatforms/ac97r22.pdf


--
ura