Subject: "IRQ not configured"
To: None <port-i386@netbsd.org>
From: Peter Seebach <seebs@plethora.net>
List: port-i386
Date: 12/30/2001 11:11:43
So, I have a machine that has problems with cardbus because it claims the IRQ
isn't configured. I have enclosed the verbose BIOS output, and the thing that
catches my eye is that it looks like the IRQ *is* configured - but, for some
reason, NetBSD doesn't like this. It's worth noticing that all the gizmos on
this machine are on IRQ 11, and under Windows, it also has the cardbus slot on
IRQ 11.
NetBSD 1.5ZA (ANNE) #1: Sun Dec 30 12:43:11 MST 2001
seebs@anne.plethora.net:/usr/src/sys/arch/i386/compile/ANNE
cpu0: Intel Pentium III (Coppermine) Celeron (686-class), 697.48 MHz
cpu0: I-cache 16 KB 32b/line 4-way, D-cache 16 KB 32b/line 2-way
cpu0: L2 cache 128 KB 32b/line 4-way
cpu0: features 383f9ff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,SEP,MTRR>
cpu0: features 383f9ff<PGE,MCA,CMOV,FGPAT,PSE36,MMX,FXSR,SSE>
total memory = 187 MB
avail memory = 170 MB
using 2426 buffers containing 9704 KB of memory
BIOS32 rev. 0 found at 0xfd720
PCI BIOS rev. 2.1 found at 0xfd83e
pcibios: config mechanism [1][x], special cycles [x][x], last bus 1
PCI IRQ Routing Table rev. 1.0 found at 0xfdf70, size 112 bytes (5 entries)
PCI Interrupt Router at 000:07:0 (VIA Technologies VT82C596A (Apollo Pro) PCI-ISA Bridge)
pciintr_link_alloc: bus 0 device 10: link 0x05 invalid
pciintr_link_alloc: bus 0 device 7: link 0x05 invalid
------------------------------------------
device vendor product pin PIRQ IRQ stage
------------------------------------------
000:07:5 0x1106 0x3058 C 0x02 11 0 WARNING: overriding irq 9
000:09:0 0x8086 0x1229 A 0x01 11 0 already assigned
000:09:1 0x11c1 0x045c A 0x01 11 0 already assigned
------------------------------------------
PCI fixup examining 1106:601
PCI fixup examining 1106:8601
PCI fixup examining 1023:8520
PCI bridge 0: primary 0, secondary 1, subordinate 1
PCI fixup examining 1106:686
PCI fixup examining 1106:571
PCI fixup examining 1106:3038
PCI fixup examining 1106:3057
PCI fixup examining 1106:3058
PCI fixup examining 8086:1229
PCI fixup examining 11c1:45c
PCI fixup examining 104c:ac50
PCI bridge 1: primary 0, secondary 2, subordinate 2
PCI bus #2 is the last bus
[System BIOS Setting]-----------------------
device vendor product
register space address size
--------------------------------------------
000:00:0 0x1106 0x0601
10h mem 0xf8000000 0x04000000
[OK]
000:01:0 0x1106 0x8601
[OK]
000:07:0 0x1106 0x0686
[OK]
000:07:1 0x1106 0x0571
20h port 0x00001460 0x00000010
[OK]
000:07:2 0x1106 0x3038
20h port 0x00001440 0x00000020
[OK]
000:07:4 0x1106 0x3057
[OK]
000:07:5 0x1106 0x3058
10h port 0x00001000 0x00000100
14h port 0x00001474 0x00000004
18h port 0x00001470 0x00000004
[OK]
000:09:0 0x8086 0x1229
10h mem 0xf4020000 0x00001000
14h port 0x00001400 0x00000040
18h mem 0xf4000000 0x00020000
[OK]
000:09:1 0x11c1 0x045c
10h port 0x00001478 0x00000008
14h mem 0xf4021000 0x00001000
[OK]
000:10:0 0x104c 0xac50
10h mem 0x00000000 0x00001000
[NG]
001:00:0 0x1023 0x8520
10h mem 0xf5000000 0x00800000
14h mem 0xf4100000 0x00020000
18h mem 0xf4800000 0x00800000
[OK]
--------------------------[ 1 devices bogus]
Physical memory end: 0x0bbe0000
PCI memory mapped I/O space start: 0x0bc00000
[PCIBIOS fixup stage]-----------------------
device vendor product
register space address size
--------------------------------------------
000:00:0 0x1106 0x0601
10h mem 0xf8000000 0x04000000
[OK]
000:01:0 0x1106 0x8601
[OK]
000:07:0 0x1106 0x0686
[OK]
000:07:1 0x1106 0x0571
20h port 0x00001460 0x00000010
[OK]
000:07:2 0x1106 0x3038
20h port 0x00001440 0x00000020
[OK]
000:07:4 0x1106 0x3057
[OK]
000:07:5 0x1106 0x3058
10h port 0x00001000 0x00000100
14h port 0x00001474 0x00000004
18h port 0x00001470 0x00000004
[OK]
000:09:0 0x8086 0x1229
10h mem 0xf4020000 0x00001000
14h port 0x00001400 0x00000040
18h mem 0xf4000000 0x00020000
[OK]
000:09:1 0x11c1 0x045c
10h port 0x00001478 0x00000008
14h mem 0xf4021000 0x00001000
[OK]
000:10:0 0x104c 0xac50
10h mem 0x0bc00000 0x00001000
[OK]
001:00:0 0x1023 0x8520
10h mem 0xf5000000 0x00800000
14h mem 0xf4100000 0x00020000
18h mem 0xf4800000 0x00800000
[OK]
--------------------------[ 0 devices bogus]
mainbus0 (root)
pnpbios0 at mainbus0: code f0000, data 400, entry 9781, control 0 eventp 400
pnpbios0: nodes 19, max len 164
PNP0C02 (mem fffe0000-ffffffff, io 80 62 66) at pnpbios0 index 0 ignored
PNP0C01 (mem 0-9ffff e8000-fffff 100000-bcfffff) at pnpbios0 index 1 ignored
PNP0200 (io 0-f 81-8f c0-df, dma 4) at pnpbios0 index 2 ignored
PNP0000 (io 20-21 a0-a1, irq 2) at pnpbios0 index 3 ignored
PNP0100 (io 40-43, irq 0) at pnpbios0 index 4 ignored
PNP0B00 (io 70-71, irq 8) at pnpbios0 index 5 ignored
PNP0303 (io 60 64, irq 1) at pnpbios0 index 6 ignored
PNP0C04 (io f0-ff, irq 13) at pnpbios0 index 7 ignored
PNP0800 (io 61) at pnpbios0 index 8 ignored
PNP0A03 (io cf8-cff) at pnpbios0 index 9 ignored
PNP0C02 (io 4d0-4d1 8000-807f 8080-808f) at pnpbios0 index 10 ignored
PNP0C02 (io 3400-347f) at pnpbios0 index 11 ignored
PNP0C02 at pnpbios0 index 12 disabled
PNP0C02 (mem cd800-cffff) at pnpbios0 index 13 ignored
PNP0F13 (irq 12) at pnpbios0 index 14 ignored
PNP0501 at pnpbios0 index 15 disabled
SMCF010 at pnpbios0 index 18 disabled
PNP0400 at pnpbios0 index 20 disabled
PNP0700 (io 3f0-3f5 3f7, irq 6, dma 2) at pnpbios0 index 24 ignored
pci0 at mainbus0 bus 0: configuration mode 1
pci0: i/o space, memory space enabled
pchb0 at pci0 dev 0 function 0: PCI configuration registers:
Common header:
0x00: 0x06011106 0x22900006 0x06000005 0x00000000
Vendor Name: VIA Technologies (0x1106)
Device ID: 0x0601
Command register: 0x0006
I/O space accesses: off
Memory space accesses: on
Bus mastering: on
Special cycles: off
MWI transactions: off
Palette snooping: off
Parity error checking: off
Address/data stepping: off
System error (SERR): off
Fast back-to-back transactions: off
Status register: 0x2290
Capability List support: on
66 MHz capable: off
User Definable Features (UDF) support: off
Fast back-to-back capable: on
Data parity error detected: off
DEVSEL timing: medium (0x1)
Slave signaled Target Abort: off
Master received Target Abort: off
Master received Master Abort: on
Asserted System Error (SERR): off
Parity error detected: off
Class Name: bridge (0x06)
Subclass Name: host (0x00)
Interface: 0x00
Revision ID: 0x05
BIST: 0x00
Header Type: 0x00 (0x00)
Latency Timer: 0x00
Cache Line Size: 0x00
Type 0 ("normal" device) header:
0x10: 0xf8000008 0x00000000 0x00000000 0x00000000
0x20: 0x00000000 0x00000000 0x00000000 0x00000000
0x30: 0x00000000 0x000000a0 0x00000000 0x00000000
Base address register at 0x10
type: 32-bit prefetchable memory
base: 0xf8000000, not sized
Base address register at 0x14
not implemented(?)
Base address register at 0x18
not implemented(?)
Base address register at 0x1c
not implemented(?)
Base address register at 0x20
not implemented(?)
Base address register at 0x24
not implemented(?)
Cardbus CIS Pointer: 0x00000000
Subsystem vendor ID: 0x0000
Subsystem ID: 0x0000
Expansion ROM Base Address: 0x00000000
Capability list pointer: 0xa0
Reserved @ 0x38: 0x00000000
Maximum Latency: 0x00
Minimum Grant: 0x00
Interrupt pin: 0x00 (none)
Interrupt line: 0x00
Capability register at 0xa0
type: 0x02 (AGP, rev. 0.2)
Device-dependent header:
0x40: 0x00000000 0x00000000 0x00000000 0x00000000
0x50: 0xfcc8dffd 0x18180000 0x08088080 0x18180808
0x60: 0xa000aa3f 0xe0120012 0x2f654840 0x00005700
0x70: 0x0ccc88c4 0x00d2a10e 0x0001f401 0x00000000
0x80: 0x0000410f 0x000000c0 0x00000002 0x00000000
0x90: 0x00000000 0x00000000 0x00000000 0x00000000
0xa0: 0x00200002 0x07000203 0x00000000 0x0000126a
0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
0xf0: 0x00000000 0x00000000 0xa0004222 0x00002000
Don't know how to pretty-print device-dependent header.
VIA Technologies product 0x0601 (host bridge, revision 0x05) at ? dev 0 function 0 (tag 0x80000000, intrtag 0x80000000, intrswiz 0, intrpin 0, i/o off, mem on, no quirks)
pchb0: VIA Technologies product 0x0601 (rev. 0x05)
agp at pchb0 not configured
ppb0 at pci0 dev 1 function 0: PCI configuration registers:
Common header:
0x00: 0x86011106 0x22300007 0x06040000 0x00010000
Vendor Name: VIA Technologies (0x1106)
Device ID: 0x8601
Command register: 0x0007
I/O space accesses: on
Memory space accesses: on
Bus mastering: on
Special cycles: off
MWI transactions: off
Palette snooping: off
Parity error checking: off
Address/data stepping: off
System error (SERR): off
Fast back-to-back transactions: off
Status register: 0x2230
Capability List support: on
66 MHz capable: on
User Definable Features (UDF) support: off
Fast back-to-back capable: off
Data parity error detected: off
DEVSEL timing: medium (0x1)
Slave signaled Target Abort: off
Master received Target Abort: off
Master received Master Abort: on
Asserted System Error (SERR): off
Parity error detected: off
Class Name: bridge (0x06)
Subclass Name: PCI (0x04)
Interface: 0x00
Revision ID: 0x00
BIST: 0x00
Header Type: 0x01 (0x01)
Latency Timer: 0x00
Cache Line Size: 0x00
Type 1 (PCI-PCI bridge) header:
0x10: 0x00000000 0x00000000 0x00010100 0x000000f0
0x20: 0xf570f410 0x0000fff0 0x00000000 0x00000000
0x30: 0x00000000 0x00000000 0x00000000 0x000c0000
Base address register at 0x10
not implemented(?)
Base address register at 0x14
not implemented(?)
Primary bus number: 0x00
Secondary bus number: 0x01
Subordinate bus number: 0x01
Secondary bus latency timer: 0x00
Secondary status register: 0x0000
66 MHz capable: off
User Definable Features (UDF) support: off
Fast back-to-back capable: off
Data parity error detected: off
DEVSEL timing: fast (0x0)
Signaled Target Abort: off
Received Target Abort: off
Received Master Abort: off
System Error: off
Parity Error: off
I/O region:
base register: 0xf0
limit register: 0x00
base upper 16 bits register: 0x0000
limit upper 16 bits register: 0x0000
Memory region:
base register: 0xf410
limit register: 0xf570
Prefetchable memory region:
base register: 0xfff0
limit register: 0x0000
base upper 32 bits register: 0x00000000
limit upper 32 bits register: 0x00000000
Reserved @ 0x34: 0x00000000
Expansion ROM Base Address: 0x00000000
Interrupt line: 0x00
Interrupt pin: 0x00 (none)
Bridge control register: 0x000c
Parity error response: off
Secondary SERR forwarding: off
ISA enable: on
VGA enable: on
Master abort reporting: off
Secondary bus reset: off
Fast back-to-back capable: off
Device-dependent header:
0x40: 0x44004dca 0x00000000 0x00000000 0x00000000
0x50: 0x00000000 0x00000000 0x00000000 0x00000000
0x60: 0x00000000 0x00000000 0x00000000 0x00000000
0x70: 0x00000000 0x00000000 0x00000000 0x00000000
0x80: 0x00020001 0x00000000 0x00000000 0x00000000
0x90: 0x00000000 0x00000000 0x00000000 0x00000000
0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
0xf0: 0x00000000 0x00000000 0x00000000 0x00000000
Don't know how to pretty-print device-dependent header.
VIA Technologies product 0x8601 (PCI bridge) at ? dev 1 function 0 (tag 0x80000800, intrtag 0x80000800, intrswiz 0, intrpin 0, i/o on, mem on, no quirks): VIA Technologies product 0x8601 (rev. 0x00)
pci1 at ppb0 bus 1
pci1: i/o space, memory space enabled
vga1 at pci1 dev 0 function 0: PCI configuration registers:
Common header:
0x00: 0x85201023 0x02b00207 0x0300006a 0x00004000
Vendor Name: Trident Microsystems (0x1023)
Device ID: 0x8520
Command register: 0x0207
I/O space accesses: on
Memory space accesses: on
Bus mastering: on
Special cycles: off
MWI transactions: off
Palette snooping: off
Parity error checking: off
Address/data stepping: off
System error (SERR): off
Fast back-to-back transactions: on
Status register: 0x02b0
Capability List support: on
66 MHz capable: on
User Definable Features (UDF) support: off
Fast back-to-back capable: on
Data parity error detected: off
DEVSEL timing: medium (0x1)
Slave signaled Target Abort: off
Master received Target Abort: off
Master received Master Abort: off
Asserted System Error (SERR): off
Parity error detected: off
Class Name: display (0x03)
Subclass Name: VGA (0x00)
Interface: 0x00
Revision ID: 0x6a
BIST: 0x00
Header Type: 0x00 (0x00)
Latency Timer: 0x40
Cache Line Size: 0x00
Type 0 ("normal" device) header:
0x10: 0xf5000000 0xf4100000 0xf4800000 0x00000000
0x20: 0x00000000 0x00000000 0x00000000 0xb16e0e11
0x30: 0x00000000 0x00000080 0x00000000 0x00000109
Base address register at 0x10
type: 32-bit nonprefetchable memory
base: 0xf5000000, size: 0x00800000
Base address register at 0x14
type: 32-bit nonprefetchable memory
base: 0xf4100000, size: 0x00020000
Base address register at 0x18
type: 32-bit nonprefetchable memory
base: 0xf4800000, size: 0x00800000
Base address register at 0x1c
not implemented(?)
Base address register at 0x20
not implemented(?)
Base address register at 0x24
not implemented(?)
Cardbus CIS Pointer: 0x00000000
Subsystem vendor ID: 0x0e11
Subsystem ID: 0xb16e
Expansion ROM Base Address: 0x00000000
Capability list pointer: 0x80
Reserved @ 0x38: 0x00000000
Maximum Latency: 0x00
Minimum Grant: 0x00
Interrupt pin: 0x01 (pin A)
Interrupt line: 0x09
Capability register at 0x80
type: 0x02 (AGP, rev. 0.1)
Capability register at 0x90
type: 0x01 (Power Management, rev. 1.0)
Device-dependent header:
0x40: 0x00000000 0x00000000 0x00000000 0x00000000
0x50: 0x00000000 0x00000000 0x00000000 0x00000000
0x60: 0x00000000 0x00000000 0x00000000 0x00000000
0x70: 0x00000000 0x00000000 0x00000000 0x00000000
0x80: 0x00109002 0x20000203 0x00000000 0x00000000
0x90: 0x06210001 0x00000000 0x00000000 0x00000000
0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
0xf0: 0x00000000 0x00000000 0x00000000 0x00000000
Don't know how to pretty-print device-dependent header.
Trident Microsystems product 0x8520 (VGA display, revision 0x6a) at ? dev 0 function 0 (tag 0x80010000, intrtag 0x80000800, intrswiz 0, intrpin 0x1, i/o on, mem on, no quirks): Trident Microsystems product 0x8520 (rev. 0x6a)
wsdisplay0 at vga1 kbdmux 1: console (80x25, vt100 emulation)
pcib0 at pci0 dev 7 function 0: PCI configuration registers:
Common header:
0x00: 0x06861106 0x02100087 0x06010022 0x00800000
Vendor Name: VIA Technologies (0x1106)
Device Name: VT82C686A (Apollo KX133) PCI-ISA Bridge (0x0686)
Command register: 0x0087
I/O space accesses: on
Memory space accesses: on
Bus mastering: on
Special cycles: off
MWI transactions: off
Palette snooping: off
Parity error checking: off
Address/data stepping: on
System error (SERR): off
Fast back-to-back transactions: off
Status register: 0x0210
Capability List support: on
66 MHz capable: off
User Definable Features (UDF) support: off
Fast back-to-back capable: off
Data parity error detected: off
DEVSEL timing: medium (0x1)
Slave signaled Target Abort: off
Master received Target Abort: off
Master received Master Abort: off
Asserted System Error (SERR): off
Parity error detected: off
Class Name: bridge (0x06)
Subclass Name: ISA (0x01)
Interface: 0x00
Revision ID: 0x22
BIST: 0x00
Header Type: 0x00+multifunction (0x80)
Latency Timer: 0x00
Cache Line Size: 0x00
Type 0 ("normal" device) header:
0x10: 0x00000000 0x00000000 0x00000000 0x00000000
0x20: 0x00000000 0x00000000 0x00000000 0x00001106
0x30: 0x00000000 0x00000000 0x00000000 0x00000000
Base address register at 0x10
not implemented(?)
Base address register at 0x14
not implemented(?)
Base address register at 0x18
not implemented(?)
Base address register at 0x1c
not implemented(?)
Base address register at 0x20
not implemented(?)
Base address register at 0x24
not implemented(?)
Cardbus CIS Pointer: 0x00000000
Subsystem vendor ID: 0x1106
Subsystem ID: 0x0000
Expansion ROM Base Address: 0x00000000
Capability list pointer: 0x00
Reserved @ 0x38: 0x00000000
Maximum Latency: 0x00
Minimum Grant: 0x00
Interrupt pin: 0x00 (none)
Interrupt line: 0x00
Device-dependent header:
0x40: 0x90002008 0xee600000 0x00040001 0xf3000000
0x50: 0x0000060a 0xb09b9000 0x00fc0200 0x00000050
0x60: 0x34103400 0x34303420 0x34400008 0x34603450
0x70: 0x00000000 0x43822844 0x00000000 0x00000000
0x80: 0x00000000 0x00001900 0x00000000 0x00000000
0x90: 0x00000000 0x00000000 0x00000000 0x00000000
0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
0xc0: 0x00020001 0x00000000 0x00000000 0x00000000
0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
0xf0: 0x00000000 0x00000000 0x00000000 0x00000000
Don't know how to pretty-print device-dependent header.
VIA Technologies VT82C686A (Apollo KX133) PCI-ISA Bridge (ISA bridge, revision 0x22) at ? dev 7 function 0 (tag 0x80003800, intrtag 0x80003800, intrswiz 0, intrpin 0, i/o on, mem on, no quirks)
pcib0: VIA Technologies VT82C686A (Apollo KX133) PCI-ISA Bridge (rev. 0x22)
pciide0 at pci0 dev 7 function 1: PCI configuration registers:
Common header:
0x00: 0x05711106 0x02900007 0x01018a10 0x00004000
Vendor Name: VIA Technologies (0x1106)
Device Name: VT82C586A IDE Controller (0x0571)
Command register: 0x0007
I/O space accesses: on
Memory space accesses: on
Bus mastering: on
Special cycles: off
MWI transactions: off
Palette snooping: off
Parity error checking: off
Address/data stepping: off
System error (SERR): off
Fast back-to-back transactions: off
Status register: 0x0290
Capability List support: on
66 MHz capable: off
User Definable Features (UDF) support: off
Fast back-to-back capable: on
Data parity error detected: off
DEVSEL timing: medium (0x1)
Slave signaled Target Abort: off
Master received Target Abort: off
Master received Master Abort: off
Asserted System Error (SERR): off
Parity error detected: off
Class Name: mass storage (0x01)
Subclass Name: IDE (0x01)
Interface: 0x8a
Revision ID: 0x10
BIST: 0x00
Header Type: 0x00 (0x00)
Latency Timer: 0x40
Cache Line Size: 0x00
Type 0 ("normal" device) header:
0x10: 0x00000000 0x00000000 0x00000000 0x00000000
0x20: 0x00001461 0x00000000 0x00000000 0x00000000
0x30: 0x00000000 0x000000c0 0x00000000 0x00000000
Base address register at 0x10
not implemented(?)
Base address register at 0x14
not implemented(?)
Base address register at 0x18
not implemented(?)
Base address register at 0x1c
not implemented(?)
Base address register at 0x20
type: 32-bit i/o
base: 0x00001460, size: 0x00000010
Base address register at 0x24
not implemented(?)
Cardbus CIS Pointer: 0x00000000
Subsystem vendor ID: 0x0000
Subsystem ID: 0x0000
Expansion ROM Base Address: 0x00000000
Capability list pointer: 0xc0
Reserved @ 0x38: 0x00000000
Maximum Latency: 0x00
Minimum Grant: 0x00
Interrupt pin: 0x00 (none)
Interrupt line: 0x00
Capability register at 0xc0
type: 0x01 (Power Management, rev. 1.0)
Device-dependent header:
0x40: 0x3a080203 0x00c01068 0x205e205e 0xffff0066
0x50: 0x620f620f 0x00000014 0xa8a8a8a8 0x00000000
0x60: 0x00000200 0x00000000 0x00000200 0x00000000
0x70: 0x00000102 0x00000000 0x00000102 0x00000000
0x80: 0x0009f960 0x00000000 0x00000000 0x00000000
0x90: 0x00000000 0x00000000 0x00000000 0x00000000
0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
0xc0: 0x00020001 0x00000000 0x00000000 0x00000000
0xd0: 0x05710010 0x00000000 0x00000000 0x00000000
0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
0xf0: 0x00000000 0x00000000 0x00000000 0x00000000
Don't know how to pretty-print device-dependent header.
VIA Technologies VT82C586A IDE Controller (IDE mass storage, interface 0x8a, revision 0x10) at ? dev 7 function 1 (tag 0x80003900, intrtag 0x80003900, intrswiz 0, intrpin 0, i/o on, mem on, no quirks): VIA Technologies VT82C686A (Apollo KX133) ATA66 controller
pciide0: bus-master DMA support present
pciide0: primary channel configured to compatibility mode
wd0 at pciide0 channel 0 drive 0: <TOSHIBA MK1016GAP>
wd0: drive supports 16-sector PIO transfers, LBA addressing
wd0: 9590 MB, 16383 cyl, 16 head, 63 sec, 512 bytes/sect x 19640880 sectors
wd0: 32-bit data port
wd0: drive supports PIO mode 4, DMA mode 2, Ultra-DMA mode 4 (Ultra/66)
pciide0: primary channel interrupting at irq 14
wd0(pciide0:0:0): using PIO mode 4, Ultra-DMA mode 4 (Ultra/66) (using DMA data transfers)
pciide0: secondary channel configured to compatibility mode
atapibus0 at pciide0 channel 1: 2 targets
cd0 at atapibus0 drive 0: <CRN-8243B, 2000/01/28, 1.04> type 5 cdrom removable
cd0: 32-bit data port
cd0: drive supports PIO mode 4, DMA mode 2, Ultra-DMA mode 2 (Ultra/33)
pciide0: secondary channel interrupting at irq 15
cd0(pciide0:1:0): using PIO mode 4, Ultra-DMA mode 2 (Ultra/33) (using DMA data transfers)
uhci0 at pci0 dev 7 function 2: PCI configuration registers:
Common header:
0x00: 0x30381106 0x02100017 0x0c030010 0x00004008
Vendor Name: VIA Technologies (0x1106)
Device Name: VT83C572 USB Controller (0x3038)
Command register: 0x0017
I/O space accesses: on
Memory space accesses: on
Bus mastering: on
Special cycles: off
MWI transactions: on
Palette snooping: off
Parity error checking: off
Address/data stepping: off
System error (SERR): off
Fast back-to-back transactions: off
Status register: 0x0210
Capability List support: on
66 MHz capable: off
User Definable Features (UDF) support: off
Fast back-to-back capable: off
Data parity error detected: off
DEVSEL timing: medium (0x1)
Slave signaled Target Abort: off
Master received Target Abort: off
Master received Master Abort: off
Asserted System Error (SERR): off
Parity error detected: off
Class Name: serial bus (0x0c)
Subclass Name: USB (0x03)
Interface: 0x00
Revision ID: 0x10
BIST: 0x00
Header Type: 0x00 (0x00)
Latency Timer: 0x40
Cache Line Size: 0x08
Type 0 ("normal" device) header:
0x10: 0x00000000 0x00000000 0x00000000 0x00000000
0x20: 0x00001441 0x00000000 0x00000000 0x12340925
0x30: 0x00000000 0x00000080 0x00000000 0x0000040b
Base address register at 0x10
not implemented(?)
Base address register at 0x14
not implemented(?)
Base address register at 0x18
not implemented(?)
Base address register at 0x1c
not implemented(?)
Base address register at 0x20
type: 32-bit i/o
base: 0x00001440, size: 0x00000020
Base address register at 0x24
not implemented(?)
Cardbus CIS Pointer: 0x00000000
Subsystem vendor ID: 0x0925
Subsystem ID: 0x1234
Expansion ROM Base Address: 0x00000000
Capability list pointer: 0x80
Reserved @ 0x38: 0x00000000
Maximum Latency: 0x00
Minimum Grant: 0x00
Interrupt pin: 0x04 (pin D)
Interrupt line: 0x0b
Capability register at 0x80
type: 0x01 (Power Management, rev. 1.0)
Device-dependent header:
0x40: 0x00051000 0x103100c2 0x00000000 0x00000000
0x50: 0x00000000 0x00000000 0x00000000 0x00000000
0x60: 0x00000010 0x00000000 0x00000000 0x00000000
0x70: 0x00000000 0x00000000 0x00000000 0x00000000
0x80: 0x00020001 0x00000000 0x00000000 0x00000000
0x90: 0x00000000 0x00000000 0x00000000 0x00000000
0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
0xc0: 0x00002000 0x00000000 0x00000000 0x00000000
0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
0xf0: 0x00000000 0x00000000 0x00000000 0x00000000
Don't know how to pretty-print device-dependent header.
VIA Technologies VT83C572 USB Controller (USB serial bus, revision 0x10) at ? dev 7 function 2 (tag 0x80003a00, intrtag 0x80003a00, intrswiz 0, intrpin 0x4, i/o on, mem on, no quirks): VIA Technologies VT83C572 USB Controller (rev. 0x10)
uhci0: interrupting at irq 11
usb0 at uhci0: USB revision 1.0
uhub0 at usb0
uhub0: VIA Technologie UHCI root hub, class 9/0, rev 1.00/1.00, addr 1
uhub0: 2 ports with 2 removable, self powered
VIA Technologies VT82C686A SMBus Controller (miscellaneous bridge, revision 0x30) at pci0 dev 7 function 4: PCI configuration registers:
Common header:
0x00: 0x30571106 0x02900000 0x06800030 0x00000000
Vendor Name: VIA Technologies (0x1106)
Device Name: VT82C686A SMBus Controller (0x3057)
Command register: 0x0000
I/O space accesses: off
Memory space accesses: off
Bus mastering: off
Special cycles: off
MWI transactions: off
Palette snooping: off
Parity error checking: off
Address/data stepping: off
System error (SERR): off
Fast back-to-back transactions: off
Status register: 0x0290
Capability List support: on
66 MHz capable: off
User Definable Features (UDF) support: off
Fast back-to-back capable: on
Data parity error detected: off
DEVSEL timing: medium (0x1)
Slave signaled Target Abort: off
Master received Target Abort: off
Master received Master Abort: off
Asserted System Error (SERR): off
Parity error detected: off
Class Name: bridge (0x06)
Subclass Name: miscellaneous (0x80)
Interface: 0x00
Revision ID: 0x30
BIST: 0x00
Header Type: 0x00 (0x00)
Latency Timer: 0x00
Cache Line Size: 0x00
Type 0 ("normal" device) header:
0x10: 0x00000000 0x00000000 0x00000000 0x00000000
0x20: 0x00000000 0x00000000 0x00000000 0x00000000
0x30: 0x00000000 0x00000068 0x00000000 0x00000000
Base address register at 0x10
not implemented(?)
Base address register at 0x14
not implemented(?)
Base address register at 0x18
not implemented(?)
Base address register at 0x1c
not implemented(?)
Base address register at 0x20
not implemented(?)
Base address register at 0x24
not implemented(?)
Cardbus CIS Pointer: 0x00000000
Subsystem vendor ID: 0x0000
Subsystem ID: 0x0000
Expansion ROM Base Address: 0x00000000
Capability list pointer: 0x68
Reserved @ 0x38: 0x00000000
Maximum Latency: 0x00
Minimum Grant: 0x00
Interrupt pin: 0x00 (none)
Interrupt line: 0x00
Capability register at 0x68
type: 0x01 (Power Management, rev. 1.0)
Device-dependent header:
0x40: 0x00508400 0x000040da 0x00008001 0x00000000
0x50: 0x00ffff08 0x00000040 0x00ffff00 0x00000000
0x60: 0x00000000 0x00000000 0x00020001 0x00000000
0x70: 0x00000001 0x00000000 0x00000000 0x00000000
0x80: 0x00000000 0x00000000 0x00000000 0x00000000
0x90: 0x00008081 0x00000000 0x00000000 0x00000000
0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
0xf0: 0x00000000 0x00000000 0x00000000 0x00000000
Don't know how to pretty-print device-dependent header.
VIA Technologies VT82C686A SMBus Controller (miscellaneous bridge, revision 0x30) at pci0 dev 7 function 4 (tag 0x80003c00, intrtag 0x80003c00, intrswiz 0, intrpin 0, i/o off, mem off, no quirks) not configured
auvia0 at pci0 dev 7 function 5: PCI configuration registers:
Common header:
0x00: 0x30581106 0x02100001 0x04010020 0x00000000
Vendor Name: VIA Technologies (0x1106)
Device Name: VT82C686A AC-97 Audio Controller (0x3058)
Command register: 0x0001
I/O space accesses: on
Memory space accesses: off
Bus mastering: off
Special cycles: off
MWI transactions: off
Palette snooping: off
Parity error checking: off
Address/data stepping: off
System error (SERR): off
Fast back-to-back transactions: off
Status register: 0x0210
Capability List support: on
66 MHz capable: off
User Definable Features (UDF) support: off
Fast back-to-back capable: off
Data parity error detected: off
DEVSEL timing: medium (0x1)
Slave signaled Target Abort: off
Master received Target Abort: off
Master received Master Abort: off
Asserted System Error (SERR): off
Parity error detected: off
Class Name: multimedia (0x04)
Subclass Name: audio (0x01)
Interface: 0x00
Revision ID: 0x20
BIST: 0x00
Header Type: 0x00 (0x00)
Latency Timer: 0x00
Cache Line Size: 0x00
Type 0 ("normal" device) header:
0x10: 0x00001001 0x00001475 0x00001471 0x00000000
0x20: 0x00000000 0x00000000 0x00000000 0xb1940e11
0x30: 0x00000000 0x000000c0 0x00000000 0x0000030b
Base address register at 0x10
type: 32-bit i/o
base: 0x00001000, size: 0x00000100
Base address register at 0x14
type: 32-bit i/o
base: 0x00001474, size: 0x00000004
Base address register at 0x18
type: 32-bit i/o
base: 0x00001470, size: 0x00000004
Base address register at 0x1c
not implemented(?)
Base address register at 0x20
not implemented(?)
Base address register at 0x24
not implemented(?)
Cardbus CIS Pointer: 0x00000000
Subsystem vendor ID: 0x0e11
Subsystem ID: 0xb194
Expansion ROM Base Address: 0x00000000
Capability list pointer: 0xc0
Reserved @ 0x38: 0x00000000
Maximum Latency: 0x00
Minimum Grant: 0x00
Interrupt pin: 0x03 (pin C)
Interrupt line: 0x0b
Capability register at 0xc0
type: 0x01 (Power Management, rev. 1.0)
Device-dependent header:
0x40: 0x1c40c001 0x00000000 0x02000001 0x00000000
0x50: 0x00000000 0x00000000 0x00000000 0x00000000
0x60: 0x00000000 0x00000000 0x00000000 0x00000000
0x70: 0x00000000 0x00000000 0x00000000 0x00000000
0x80: 0x00000000 0x00000000 0x00000000 0x00000000
0x90: 0x00000000 0x00000000 0x00000000 0x00000000
0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
0xc0: 0x00020001 0x00000000 0x00000000 0x00000000
0xd0: 0x00020001 0x00000000 0x00000000 0x00000000
0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
0xf0: 0x00000000 0x00000000 0x00000000 0x00000000
Don't know how to pretty-print device-dependent header.
VIA Technologies VT82C686A AC-97 Audio Controller (audio multimedia, revision 0x20) at ? dev 7 function 5 (tag 0x80003d00, intrtag 0x80003d00, intrswiz 0, intrpin 0x3, i/o on, mem off, no quirks): VIA VT82C686A AC'97 Audio (rev H)
auvia0: interrupting at irq 11
auvia0: ADS72 codec; headphone, Analog Devices Phat Stereo
audio0 at auvia0: full duplex, mmap, independent
fxp0 at pci0 dev 9 function 0: PCI configuration registers:
Common header:
0x00: 0x12298086 0x02900017 0x02000009 0x00804208
Vendor Name: Intel (0x8086)
Device Name: 82557 Fast Ethernet LAN Controller (0x1229)
Command register: 0x0017
I/O space accesses: on
Memory space accesses: on
Bus mastering: on
Special cycles: off
MWI transactions: on
Palette snooping: off
Parity error checking: off
Address/data stepping: off
System error (SERR): off
Fast back-to-back transactions: off
Status register: 0x0290
Capability List support: on
66 MHz capable: off
User Definable Features (UDF) support: off
Fast back-to-back capable: on
Data parity error detected: off
DEVSEL timing: medium (0x1)
Slave signaled Target Abort: off
Master received Target Abort: off
Master received Master Abort: off
Asserted System Error (SERR): off
Parity error detected: off
Class Name: network (0x02)
Subclass Name: ethernet (0x00)
Interface: 0x00
Revision ID: 0x09
BIST: 0x00
Header Type: 0x00+multifunction (0x80)
Latency Timer: 0x42
Cache Line Size: 0x08
Type 0 ("normal" device) header:
0x10: 0xf4020000 0x00001401 0xf4000000 0x00000000
0x20: 0x00000000 0x00000000 0x00000000 0x22018086
0x30: 0x00000000 0x000000dc 0x00000000 0x3808010b
Base address register at 0x10
type: 32-bit nonprefetchable memory
base: 0xf4020000, size: 0x00001000
Base address register at 0x14
type: 32-bit i/o
base: 0x00001400, size: 0x00000040
Base address register at 0x18
type: 32-bit nonprefetchable memory
base: 0xf4000000, size: 0x00020000
Base address register at 0x1c
not implemented(?)
Base address register at 0x20
not implemented(?)
Base address register at 0x24
not implemented(?)
Cardbus CIS Pointer: 0x00000000
Subsystem vendor ID: 0x8086
Subsystem ID: 0x2201
Expansion ROM Base Address: 0x00000000
Capability list pointer: 0xdc
Reserved @ 0x38: 0x00000000
Maximum Latency: 0x38
Minimum Grant: 0x08
Interrupt pin: 0x01 (pin A)
Interrupt line: 0x0b
Capability register at 0xdc
type: 0x01 (Power Management, rev. 1.0)
Device-dependent header:
0x40: 0x00000000 0x00000000 0x00000000 0x00000000
0x50: 0x00000000 0x00000000 0x00000000 0x00000000
0x60: 0x00000000 0x00000000 0x00000000 0x00000000
0x70: 0x00000000 0x00000000 0x00000000 0x00000000
0x80: 0x00000000 0x00000000 0x00000000 0x00000000
0x90: 0x00000000 0x00000000 0x00000000 0x00000000
0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
0xd0: 0x00000000 0x00000000 0x00000000 0xfe220001
0xe0: 0x3c004000 0x00000000 0x00000000 0x00000000
0xf0: 0x00000000 0x00000000 0x00000000 0x00000000
Don't know how to pretty-print device-dependent header.
Intel 82557 Fast Ethernet LAN Controller (ethernet network, revision 0x09) at ? dev 9 function 0 (tag 0x80004800, intrtag 0x80004800, intrswiz 0, intrpin 0x1, i/o on, mem on, no quirks): i82559S Ethernet, rev 9
fxp0: interrupting at irq 11
fxp0: detected 256 word EEPROM
fxp0: Ethernet address 00:d0:59:67:b6:8d
inphy0 at fxp0 phy 1: i82555 10/100 media interface, rev. 4
inphy0: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, auto
Lucent Technologies product 0x045c (serial communications) at pci0 dev 9 function 1: PCI configuration registers:
Common header:
0x00: 0x045c11c1 0x02100003 0x07000000 0x00800000
Vendor Name: Lucent Technologies (0x11c1)
Device ID: 0x045c
Command register: 0x0003
I/O space accesses: on
Memory space accesses: on
Bus mastering: off
Special cycles: off
MWI transactions: off
Palette snooping: off
Parity error checking: off
Address/data stepping: off
System error (SERR): off
Fast back-to-back transactions: off
Status register: 0x0210
Capability List support: on
66 MHz capable: off
User Definable Features (UDF) support: off
Fast back-to-back capable: off
Data parity error detected: off
DEVSEL timing: medium (0x1)
Slave signaled Target Abort: off
Master received Target Abort: off
Master received Master Abort: off
Asserted System Error (SERR): off
Parity error detected: off
Class Name: communications (0x07)
Subclass Name: serial (0x00)
Interface: 0x00
Revision ID: 0x00
BIST: 0x00
Header Type: 0x00+multifunction (0x80)
Latency Timer: 0x00
Cache Line Size: 0x00
Type 0 ("normal" device) header:
0x10: 0x00001479 0xf4021000 0x00000000 0x00000000
0x20: 0x00000000 0x00000000 0x00000000 0x22018086
0x30: 0x00000000 0x000000dc 0x00000000 0x0000010b
Base address register at 0x10
type: 32-bit i/o
base: 0x00001478, size: 0x00000008
Base address register at 0x14
type: 32-bit nonprefetchable memory
base: 0xf4021000, size: 0x00001000
Base address register at 0x18
not implemented(?)
Base address register at 0x1c
not implemented(?)
Base address register at 0x20
not implemented(?)
Base address register at 0x24
not implemented(?)
Cardbus CIS Pointer: 0x00000000
Subsystem vendor ID: 0x8086
Subsystem ID: 0x2201
Expansion ROM Base Address: 0x00000000
Capability list pointer: 0xdc
Reserved @ 0x38: 0x00000000
Maximum Latency: 0x00
Minimum Grant: 0x00
Interrupt pin: 0x01 (pin A)
Interrupt line: 0x0b
Capability register at 0xdc
type: 0x01 (Power Management, rev. 1.0)
Device-dependent header:
0x40: 0x00000000 0x00000000 0x00000000 0x00000000
0x50: 0x00000000 0x00000000 0x00000000 0x00000000
0x60: 0x00000000 0x00000000 0x00000000 0x00000000
0x70: 0x00000000 0x00000000 0x00000000 0x00000000
0x80: 0x00000000 0x00000000 0x00000000 0x00000000
0x90: 0x00000000 0x00000000 0x00000000 0x00000000
0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
0xd0: 0x00000000 0x00000000 0x00000000 0xfe220001
0xe0: 0x00004000 0x00000000 0x00000000 0x00000000
0xf0: 0x00000000 0x00000000 0x00000000 0x00000000
Don't know how to pretty-print device-dependent header.
Lucent Technologies product 0x045c (serial communications) at pci0 dev 9 function 1 (tag 0x80004900, intrtag 0x80004900, intrswiz 0, intrpin 0x1, i/o on, mem on, no quirks) not configured
cbb0 at pci0 dev 10 function 0: PCI configuration registers:
Common header:
0x00: 0xac50104c 0x02100007 0x06070001 0x00022000
Vendor Name: Texas Instruments (0x104c)
Device Name: PCI1410 PCI-CardBus Bridge (0xac50)
Command register: 0x0007
I/O space accesses: on
Memory space accesses: on
Bus mastering: on
Special cycles: off
MWI transactions: off
Palette snooping: off
Parity error checking: off
Address/data stepping: off
System error (SERR): off
Fast back-to-back transactions: off
Status register: 0x0210
Capability List support: on
66 MHz capable: off
User Definable Features (UDF) support: off
Fast back-to-back capable: off
Data parity error detected: off
DEVSEL timing: medium (0x1)
Slave signaled Target Abort: off
Master received Target Abort: off
Master received Master Abort: off
Asserted System Error (SERR): off
Parity error detected: off
Class Name: bridge (0x06)
Subclass Name: CardBus (0x07)
Interface: 0x00
Revision ID: 0x01
BIST: 0x00
Header Type: 0x02 (0x02)
Latency Timer: 0x20
Cache Line Size: 0x00
Type 2 (PCI-CardBus bridge) header:
0x10: 0x0bc00000 0x020000a0 0x00020200 0x00000000
0x20: 0x00000000 0x00000000 0x00000000 0x00000000
0x30: 0x00000000 0x00000000 0x00000000 0x03c001ff
0x40: 0xb1030e11 0x000003e1
Base address register at 0x10 (CardBus socket/ExCA registers)
type: 32-bit nonprefetchable memory
base: 0x0bc00000, size: 0x00001000
Reserved @ 0x14: 0x00a0
Secondary status register: 0x0200
66 MHz capable: off
User Definable Features (UDF) support: off
Fast back-to-back capable: off
Data parity error detection: off
DEVSEL timing: medium (0x1)
PCI target aborts terminate CardBus bus master transactions: off
CardBus target aborts terminate PCI bus master transactions: off
Bus initiator aborts terminate initiator transactions: off
System error: off
Parity error: off
PCI bus number: 0x00
CardBus bus number: 0x02
Subordinate bus number: 0x02
CardBus latency timer: 0x00
CardBus memory region 0:
base register: 0x00000000
limit register: 0x00000000
CardBus memory region 1:
base register: 0x00000000
limit register: 0x00000000
CardBus I/O region 0:
base register: 0x00000000
limit register: 0x00000000
CardBus I/O region 1:
base register: 0x00000000
limit register: 0x00000000
Interrupt line: 0xff
Interrupt pin: 0x01 (pin A)
Bridge control register: 0x03c0
Parity error response: off
CardBus SERR forwarding: off
ISA enable: off
VGA enable: off
CardBus master abort reporting: off
CardBus reset: on
Functional interrupts routed by ExCA registers: on
Memory window 0 prefetchable: on
Memory window 1 prefetchable: on
Write posting enable: off
Subsystem vendor ID: 0x0e11
Subsystem ID: 0xb103
Base address register at 0x44 (legacy-mode registers)
type: 32-bit i/o
base: 0x000003e0, size: 0x00000004
Device-dependent header:
0x48: 0x00000000 0x00000000
0x50: 0x00000000 0x00000000 0x00000000 0x00000000
0x60: 0x00000000 0x00000000 0x00000000 0x00000000
0x70: 0x00000000 0x00000000 0x00000000 0x00000000
0x80: 0xc0449060 0x00000000 0x00000000 0x00001012
0x90: 0x616482c0 0x00000000 0x00000000 0x00000000
0xa0: 0xfe110001 0x00c00100 0x00000002 0x0002001f
0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
0xf0: 0x00000000 0x00000000 0x00000000 0x00000000
Don't know how to pretty-print device-dependent header.
Texas Instruments PCI1410 PCI-CardBus Bridge (CardBus bridge, revision 0x01) at ? dev 10 function 0 (tag 0x80005000, intrtag 0x80005000, intrswiz 0, intrpin 0x1, i/o on, mem on, no quirks): Texas Instruments PCI1410 PCI-CardBus Bridge (rev. 0x01)
cbb0: NOT USED because of unconfigured interrupt
isa0 at pcib0
com0 at isa0 port 0x3f8-0x3ff irq 4: ns16550a, working fifo
com1 at isa0 port 0x2f8-0x2ff irq 3: ns16550a, working fifo
pckbc0 at isa0 port 0x60-0x64
pckbd0 at pckbc0 (kbd slot)
pckbc0: using irq 1 for kbd slot
wskbd0 at pckbd0: console keyboard, using wsdisplay0
pmsiprobe: intellimode -> 6
pms0 at pckbc0 (aux slot)
pckbc0: using irq 12 for aux slot
wsmouse0 at pms0 mux 0
lpt0 at isa0 port 0x378-0x37b irq 7
pcppi0 at isa0 port 0x61
spkr0 at pcppi0
sysbeep0 at pcppi0
isapnp0 at isa0 port 0x279: ISA Plug 'n Play device support
npx0 at isa0 port 0xf0-0xff: using exception 16
fdc0 at isa0 port 0x3f0-0x3f7 irq 6 drq 2
fd0 at fdc0 drive 0: 1.44MB, 80 cyl, 2 head, 18 sec
isapnp0: no ISA Plug 'n Play devices found
apm0 at mainbus0: Power Management spec V1.2
biomask ef65 netmask ef65 ttymask ffe7
uhub0: port error, restarting port 1
uhub0: port error, giving up port 1
uhub0: port error, restarting port 2
uhub0: port error, giving up port 2
umodem0 at uhub0 port 2 configuration 2 interface 0
umodem0: Creative Creative Modem Blaster USB DE5670, rev 1.00/1.00, addr 2, iclass 2/2
umodem0: data interface 1, has CM over data, has break
umodem0: status change notification available
ucom0 at umodem0
boot device: wd0
root on wd0a dumps on wd0b
init: copying out path `/sbin/init' 11
wsdisplay0: screen 1 added (80x25, vt100 emulation)
wsdisplay0: screen 2 added (80x25, vt100 emulation)
wsdisplay0: screen 3 added (80x25, vt100 emulation)
wsdisplay0: screen 4 added (80x25, vt100 emulation)