On Sun, Feb 25, 2001 at 09:34:41AM +0100, wojtek@wojtek.from.pl wrote:
> > > > interrupt. Also with today's IDE controllers you still have to read/write
> > > > registers on the PCI bus, before and after each xfer. This is slower than
> > > > main RAM, of course. With good SCSI controllers read/write of registers
> > > 
> > > yes - but this additional load isn't big unless you have one slow CPU and
> > > 20 IDE drives. 
> > 
> > It's significant for a busy server - especially if it also has to deal with
> > network interrupts.
> but... wouldn't buying faster CPU be cheaper solution?

Buying a faster CPU is not particularly likely to lower your interrupt
latency.