seebs@plethora.net (Peter Seebach) writes:

> I'm assuming we aren't just watching the "hardware" clock.  What do we do?
> Is there a way to make it sensible on a system whose clock speed can vary
> by a factor of ten over a few minutes?

We program the hardware timer (originally an Intel 8253, now emulated
in every PC chipset in the universe) to generate HZ interrupts per
second on irq 0. See sys/arch/i386/isa/clock.c. This interrupt calls
hardclock(), which assumes that 1/HZ seconds have passed... and then
does some tweaking which I don't understand. But the basic mechanism
is HZ interrupts per second.

This doesn't really depend on the CPU clock speed, but if VirtualPC
isn't delivering the interrupts we asked for, there's going to be
trouble. We don't currently have a way of noticing "hey, the
hardware's dropping lots of clock interrupts!" and somehow
recalibrating to that level of lossage.

        - Nathan