<neil@colt.net> (Neil J. McRae) writes:

> pcib0 at pci0 dev 3 function 0
> pcib0: Toshiba America Info Systems product 0x0611 (rev. 0x51)

> pcib1 at pci0 dev 5 function 0
> pcib1: Intel 82371AB PCI-to-ISA Bridge (PIIX4) (rev. 0x02)

So, it would be (theoretically) possible to have multiple ISA buses on
a machine, if the PCI-ISA bridges did interesting range-translation. 
But I don't think that they do.

Much more likely, the pcib0 is part of a super-IO chip and isn't a
"full" ISA bus, but just has a number of internal direct-decode ISA
devices (the serial, parallel, keyboard, floppy and such). The pcib1
(the Intel part) has the "full" ISA bus bridge, which is doing
subtractive decode if none of the PCI devices (including the pcib0
super-IO chip) decode the address.

So there's only one ISA address space on a machine like this.  I think
the real problem with our code is that we assume that each pcib is
associated with a distinct ISA bus, when this isn't really true in the
PC universe.

        - Nathan