On Tue, Oct 17, 2000 at 03:19:57PM -0700, Riaz wrote:

 > Does anonyone know when Intel P3 SIMD instructions will be supported
 > in NetBSD? Or more specifically, the saving of the "fpu" state 
 > in "npx.c" (there are now an additional 8 128-bit registers).  

I don't think the current FPU save code does this.  We need to improve
the FPU saving code a little anyway (to use the "fast save" instructions
available on some processors), so if you file a bug report with send-pr(1),
whoever does this might remember to do the SIMD support at the same time.

-- 
        -- Jason R. Thorpe <thorpej@zembu.com>