To everyone who has been seeing panics in pmap, with Cyrix CPUs,  after
the page zero code was added:

Could you a) try the following patch (it simply disables page zeroing for
all 6x86 CPUs; it's crude but it should work), and b) could you tell
me on which processor type you were seeing it?

Thanks,

- Frank

Index: machdep.c
===================================================================
RCS file: /cvsroot/syssrc/sys/arch/i386/i386/machdep.c,v
retrieving revision 1.392
diff -c -r1.392 machdep.c
*** machdep.c	2000/07/08 17:09:02	1.392
--- machdep.c	2000/08/06 21:33:56
***************
*** 118,123 ****
--- 118,124 ----
  #include <dev/cons.h>
  
  #include <uvm/uvm_extern.h>
+ #include <uvm/uvm_page.h>
  
  #include <sys/sysctl.h>
  
***************
*** 663,668 ****
--- 664,675 ----
  	cyrix_write_reg(0x3c, cyrix_read_reg(0x3c) | 0x87);
  	/* disable access to ccr4/ccr5 */
  	cyrix_write_reg(0xC3, cyrix_read_reg(0xC3) & ~0x10);
+ 
+ 	/*	
+ 	 * XXX disable page zero in the idle loop, it seems to
+ 	 * cause panics on these CPUs.
+ 	 */
+ 	vm_page_zero_enable = FALSE;
  }
  
  void


-- 
Frank van der Linden                           fvdl@wasabisystems.com
======================================================================
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