Subject: Re: recommended sound cards?
To: Perry E. Metzger <perry@piermont.com>
From: Manuel Bouyer <bouyer@antioche.lip6.fr>
List: port-i386
Date: 04/24/2000 20:18:04
On Mon, Apr 24, 2000 at 01:35:28PM -0400, Perry E. Metzger wrote:
>
> Just tried it again using patches from Lennart -- no joy at all. I
> confirmed that NMIDI is zero, but I'm still getting the brief hangs.
below are the patch Chris sent me. Can someone have a look at it ?
--
Manuel Bouyer <bouyer@antioche.eu.org>
--
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Date: Sun, 23 Apr 2000 18:29:17 -0700 (PDT)
From: Chris Cappuccio <chris@dqc.org>
To: bouyer@antioche.lip6.fr
Subject: eap diffs
Message-ID: <Pine.BSO.4.21.0004231828340.11726-100000@dqc.org>
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here are the diffs that begin to cause eap to hang on openbsd
Index: sys/dev/pci/eap.c
===================================================================
RCS file: /cvs/src/sys/dev/pci/eap.c,v
retrieving revision 1.8
diff -u -r1.8 eap.c
--- sys/dev/pci/eap.c 1999/12/13 06:43:01 1.8
+++ sys/dev/pci/eap.c 2000/04/23 01:48:33
@@ -1,5 +1,5 @@
-/* $OpenBSD: eap.c,v 1.8 1999/12/13 06:43:01 csapuntz Exp $ */
-/* $NetBSD: eap.c,v 1.25 1999/02/18 07:59:30 mycroft Exp $ */
+/* $OpenBSD: eap.c,v 1.8 1999/12/13 06:43:01 csapuntz Exp $ */
+/* $NetBSD: eap.c,v 1.33 2000/03/06 03:18:11 perry Exp $ */
/*
* Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
@@ -41,25 +41,28 @@
* Debugging: Andreas Gustafsson <gson@araneus.fi>
* Testing: Chuck Cranor <chuck@maria.wustl.edu>
* Phil Nelson <phil@cs.wwu.edu>
+ *
+ * ES1371/AC97: Ezra Story <ezy@panix.com>
*/
/*
- * Ensoniq AudoiPCI ES1370 + AK4531 driver.
- * Data sheets can be found at
- * http://www.ensoniq.com/multimedia/semi_html/html/es1370.zip
- * and
- * http://206.214.38.151/pdf/4531.pdf
+ * Ensoniq ES1370 + AK4531 and ES1371/ES1373 + AC97
*
- * Added Creative Ensoniq support: ES1371 + AC97 = hack city.
- * -- Ezra Story <ezy@panix.com>
- * Check es1371.zip from above, and the Audio Codec 97 spec from
- * intel.com.
+ * Documentation links:
+ *
+ * http://www.ensoniq.com/multimedia/semi_html/html/es1370.zip
+ * ftp://ftp.alsa-project.org/pub/manuals/asahi_kasei/4531.pdf
+ * http://www.ensoniq.com/multimedia/semi_html/html/es1371.zip
+ * ftp://download.intel.com/ial/scalableplatforms/audio/ac97r21.pdf
*/
+#include "midi.h"
+
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/kernel.h>
+#include <sys/fcntl.h>
#include <sys/malloc.h>
#include <sys/device.h>
@@ -68,232 +71,19 @@
#include <sys/audioio.h>
#include <dev/audio_if.h>
+#include <dev/midi_if.h>
#include <dev/mulaw.h>
#include <dev/auconv.h>
#include <dev/ic/ac97.h>
#include <machine/bus.h>
+#include <dev/pci/eapreg.h>
+
struct cfdriver eap_cd = {
NULL, "eap", DV_DULL
};
-#define PCI_CBIO 0x10
-
-#define EAP_ICSC 0x00 /* interrupt / chip select control */
-#define EAP_SERR_DISABLE 0x00000001
-#define EAP_CDC_EN 0x00000002
-#define EAP_JYSTK_EN 0x00000004
-#define EAP_UART_EN 0x00000008
-#define EAP_ADC_EN 0x00000010
-#define EAP_DAC2_EN 0x00000020
-#define EAP_DAC1_EN 0x00000040
-#define EAP_BREQ 0x00000080
-#define EAP_XTCL0 0x00000100
-#define EAP_M_CB 0x00000200
-#define EAP_CCB_INTRM 0x00000400
-#define EAP_DAC_SYNC 0x00000800
-#define EAP_WTSRSEL 0x00003000
-#define EAP_WTSRSEL_5 0x00000000
-#define EAP_WTSRSEL_11 0x00001000
-#define EAP_WTSRSEL_22 0x00002000
-#define EAP_WTSRSEL_44 0x00003000
-#define EAP_M_SBB 0x00004000
-#define EAP_MSFMTSEL 0x00008000
-#define EAP_SET_PCLKDIV(n) (((n)&0x1fff)<<16)
-#define EAP_GET_PCLKDIV(n) (((n)>>16)&0x1fff)
-#define EAP_PCLKBITS 0x1fff0000
-#define EAP_XTCL1 0x40000000
-#define EAP_ADC_STOP 0x80000000
-#define E1371_SYNC_RES (1<<14)
-
-#define EAP_ICSS 0x04 /* interrupt / chip select status */
-#define EAP_I_ADC 0x00000001
-#define EAP_I_DAC2 0x00000002
-#define EAP_I_DAC1 0x00000004
-#define EAP_I_UART 0x00000008
-#define EAP_I_MCCB 0x00000010
-#define EAP_VC 0x00000060
-#define EAP_CWRIP 0x00000100
-#define EAP_CBUSY 0x00000200
-#define EAP_CSTAT 0x00000400
-#define CT5880_AC97_RESET 0x20000000
-#define EAP_INTR 0x80000000
-
-#define EAP_UART_DATA 0x08
-#define EAP_UART_STATUS 0x09
-#define EAP_UART_CONTROL 0x09
-#define EAP_MEMPAGE 0x0c
-#define EAP_CODEC 0x10
-#define EAP_SET_CODEC(a,d) (((a)<<8) | (d))
-
-/* ES1371 Registers */
-#define E1371_CODEC 0x14
-#define E1371_CODEC_WIP (1<<30)
-#define E1371_CODEC_VALID (1<<31)
-#define E1371_CODEC_READ (1<<23)
-#define E1371_SET_CODEC(a,d) (((a)<<16) | (d))
-#define E1371_SRC 0x10
-#define E1371_SRC_RAMWE (1<<24)
-#define E1371_SRC_RBUSY (1<<23)
-#define E1371_SRC_DISABLE (1<<22)
-#define E1371_SRC_DISP1 (1<<21)
-#define E1371_SRC_DISP2 (1<<20)
-#define E1371_SRC_DISREC (1<<19)
-#define E1371_SRC_ADDR(a) ((a)<<25)
-#define E1371_SRC_STATE_MASK 0x870000
-#define E1371_SRC_STATE_OK 0x010000
-#define E1371_SRC_DATA(d) (d)
-#define E1371_SRC_DATAMASK 0xffff
-#define E1371_LEGACY 0x18
-
-/* ES1371 Sample rate converter registers */
-#define ESRC_ADC 0x78
-#define ESRC_DAC1 0x74
-#define ESRC_DAC2 0x70
-#define ESRC_ADC_VOLL 0x6c
-#define ESRC_ADC_VOLR 0x6d
-#define ESRC_DAC1_VOLL 0x7c
-#define ESRC_DAC1_VOLR 0x7d
-#define ESRC_DAC2_VOLL 0x7e
-#define ESRC_DAC2_VOLR 0x7f
-#define ESRC_TRUNC_N 0x00
-#define ESRC_IREGS 0x01
-#define ESRC_ACF 0x02
-#define ESRC_VFF 0x03
-#define ESRC_SET_TRUNC(n) ((n)<<9)
-#define ESRC_SET_N(n) ((n)<<4)
-#define ESRC_SMF 0x8000
-#define ESRC_SET_VFI(n) ((n)<<10)
-#define ESRC_SET_ACI(n) (n)
-#define ESRC_SET_ADC_VOL(n) ((n)<<8)
-#define ESRC_SET_DAC_VOLI(n) ((n)<<12)
-#define ESRC_SET_DAC_VOLF(n) (n)
-#define SRC_MAGIC ((1<15)|(1<<13)|(1<<11)|(1<<9))
-
-
-#define EAP_SIC 0x20
-#define EAP_P1_S_MB 0x00000001
-#define EAP_P1_S_EB 0x00000002
-#define EAP_P2_S_MB 0x00000004
-#define EAP_P2_S_EB 0x00000008
-#define EAP_R1_S_MB 0x00000010
-#define EAP_R1_S_EB 0x00000020
-#define EAP_P2_DAC_SEN 0x00000040
-#define EAP_P1_SCT_RLD 0x00000080
-#define EAP_P1_INTR_EN 0x00000100
-#define EAP_P2_INTR_EN 0x00000200
-#define EAP_R1_INTR_EN 0x00000400
-#define EAP_P1_PAUSE 0x00000800
-#define EAP_P2_PAUSE 0x00001000
-#define EAP_P1_LOOP_SEL 0x00002000
-#define EAP_P2_LOOP_SEL 0x00004000
-#define EAP_R1_LOOP_SEL 0x00008000
-#define EAP_SET_P2_ST_INC(i) ((i) << 16)
-#define EAP_SET_P2_END_INC(i) ((i) << 19)
-#define EAP_INC_BITS 0x003f0000
-
-#define EAP_DAC1_CSR 0x24
-#define EAP_DAC2_CSR 0x28
-#define EAP_ADC_CSR 0x2c
-#define EAP_GET_CURRSAMP(r) ((r) >> 16)
-
-#define EAP_DAC_PAGE 0xc
-#define EAP_ADC_PAGE 0xd
-#define EAP_UART_PAGE1 0xe
-#define EAP_UART_PAGE2 0xf
-
-#define EAP_DAC1_ADDR 0x30
-#define EAP_DAC1_SIZE 0x34
-#define EAP_DAC2_ADDR 0x38
-#define EAP_DAC2_SIZE 0x3c
-#define EAP_ADC_ADDR 0x30
-#define EAP_ADC_SIZE 0x34
-#define EAP_SET_SIZE(c,s) (((c)<<16) | (s))
-
-#define EAP_READ_TIMEOUT 0x1000
-#define EAP_WRITE_TIMEOUT 0x1000
-
-
-#define EAP_XTAL_FREQ 1411200 /* 22.5792 / 16 MHz */
-
-/* AK4531 registers */
-#define AK_MASTER_L 0x00
-#define AK_MASTER_R 0x01
-#define AK_VOICE_L 0x02
-#define AK_VOICE_R 0x03
-#define AK_FM_L 0x04
-#define AK_FM_R 0x05
-#define AK_CD_L 0x06
-#define AK_CD_R 0x07
-#define AK_LINE_L 0x08
-#define AK_LINE_R 0x09
-#define AK_AUX_L 0x0a
-#define AK_AUX_R 0x0b
-#define AK_MONO1 0x0c
-#define AK_MONO2 0x0d
-#define AK_MIC 0x0e
-#define AK_MONO 0x0f
-#define AK_OUT_MIXER1 0x10
-#define AK_M_FM_L 0x40
-#define AK_M_FM_R 0x20
-#define AK_M_LINE_L 0x10
-#define AK_M_LINE_R 0x08
-#define AK_M_CD_L 0x04
-#define AK_M_CD_R 0x02
-#define AK_M_MIC 0x01
-#define AK_OUT_MIXER2 0x11
-#define AK_M_AUX_L 0x20
-#define AK_M_AUX_R 0x10
-#define AK_M_VOICE_L 0x08
-#define AK_M_VOICE_R 0x04
-#define AK_M_MONO2 0x02
-#define AK_M_MONO1 0x01
-#define AK_IN_MIXER1_L 0x12
-#define AK_IN_MIXER1_R 0x13
-#define AK_IN_MIXER2_L 0x14
-#define AK_IN_MIXER2_R 0x15
-#define AK_M_TMIC 0x80
-#define AK_M_TMONO1 0x40
-#define AK_M_TMONO2 0x20
-#define AK_M2_AUX_L 0x10
-#define AK_M2_AUX_R 0x08
-#define AK_M_VOICE 0x04
-#define AK_M2_MONO2 0x02
-#define AK_M2_MONO1 0x01
-#define AK_RESET 0x16
-#define AK_PD 0x02
-#define AK_NRST 0x01
-#define AK_CS 0x17
-#define AK_ADSEL 0x18
-#define AK_MGAIN 0x19
-#define AK_NPORTS 0x20
-
-#define MAX_NPORTS AK_NPORTS
-
-/* Not sensical for AC97? */
-#define VOL_TO_ATT5(v) (0x1f - ((v) >> 3))
-#define VOL_TO_GAIN5(v) VOL_TO_ATT5(v)
-#define ATT5_TO_VOL(v) ((0x1f - (v)) << 3)
-#define GAIN5_TO_VOL(v) ATT5_TO_VOL(v)
-#define VOL_0DB 200
-
-/* Futzable parms */
-#define EAP_MASTER_VOL 0
-#define EAP_VOICE_VOL 1
-#define EAP_FM_VOL 2
-#define EAP_VIDEO_VOL 2 /* ES1371 */
-#define EAP_CD_VOL 3
-#define EAP_LINE_VOL 4
-#define EAP_AUX_VOL 5
-#define EAP_MIC_VOL 6
-#define EAP_RECORD_SOURCE 7
-#define EAP_OUTPUT_SELECT 8
-#define EAP_MIC_PREAMP 9
-#define EAP_OUTPUT_CLASS 10
-#define EAP_RECORD_CLASS 11
-#define EAP_INPUT_CLASS 12
-
/* Debug */
#ifdef AUDIO_DEBUG
#define DPRINTF(x) if (eapdebug) printf x
@@ -340,7 +130,13 @@
char sc_rrun;
#endif
- u_short sc_port[MAX_NPORTS]; /* mirror of the hardware setting */
+#if NMIDI > 0
+ void (*sc_iintr)(void *, int); /* midi input ready handler */
+ void (*sc_ointr)(void *); /* midi output ready handler */
+ void *sc_arg;
+#endif
+
+ u_short sc_port[AK_NPORTS]; /* mirror of the hardware setting */
u_int sc_record_source; /* recording source mask */
u_int sc_output_source; /* output source mask */
u_int sc_mic_preamp;
@@ -353,8 +149,10 @@
int eap_allocmem __P((struct eap_softc *, size_t, size_t, struct eap_dma *));
int eap_freemem __P((struct eap_softc *, struct eap_dma *));
+#define EWRITE1(sc, r, x) bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x))
#define EWRITE2(sc, r, x) bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x))
#define EWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x))
+#define EREAD1(sc, r) bus_space_read_1((sc)->iot, (sc)->ioh, (r))
#define EREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r))
#define EREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r))
@@ -399,6 +197,13 @@
void eap1371_reset_codec __P((void *sc));
int eap1371_get_portnum_by_name __P((struct eap_softc *, char *, char *,
char *));
+#if NMIDI > 0
+void eap_midi_close __P((void *));
+void eap_midi_getinfo __P((void *, struct midi_info *));
+int eap_midi_open __P((void *, int, void (*)(void *, int),
+ void (*)(void *), void *));
+int eap_midi_output __P((void *, int));
+#endif
struct audio_hw_if eap1370_hw_if = {
eap_open,
@@ -458,6 +263,16 @@
eap_trigger_input,
};
+#if NMIDI > 0
+struct midi_hw_if eap_midi_hw_if = {
+ eap_midi_open,
+ eap_midi_close,
+ eap_midi_output,
+ eap_midi_getinfo,
+ NULL, /* ioctl */
+};
+#endif
+
struct audio_device eap_device = {
"Ensoniq AudioPCI",
"",
@@ -766,11 +581,14 @@
struct pci_attach_args *pa = (struct pci_attach_args *)aux;
pci_chipset_tag_t pc = pa->pa_pc;
struct audio_hw_if *eap_hw_if;
+
char const *intrstr;
pci_intr_handle_t ih;
pcireg_t csr;
mixer_ctrl_t ctl;
int i;
+ pcireg_t revision = PCI_REVISION(pci_conf_read(pa->pa_pc, pa->pa_tag,
+ PCI_CLASS_REG));
sc->sc_1371 =
!(PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ENSONIQ_AUDIOPCI);
@@ -852,7 +670,14 @@
int error;
/* clean slate */
- EWRITE4(sc, EAP_SIC, 0);
+
+#define ES1371_BINTSUMM_OFF 0x07
+ if ((revision == 7) || (revision >= 9)) {
+ EWRITE4(sc, ES1371_BINTSUMM_OFF, 0x20);
+ } else {
+ EWRITE4(sc, EAP_SIC, 0);
+ }
+
EWRITE4(sc, EAP_ICSC, 0);
EWRITE4(sc, E1371_LEGACY, 0);
@@ -931,6 +756,11 @@
}
audio_attach_mi(eap_hw_if, sc, &sc->sc_dev);
+
+
+#if NMIDI > 0
+ midi_attach_mi(&eap_midi_hw_if, sc, &sc->sc_dev);
+#endif
}
int
@@ -1003,6 +833,19 @@
if (sc->sc_pintr)
sc->sc_pintr(sc->sc_parg);
}
+#if NMIDI > 0
+ if (intr & EAP_I_UART) {
+ u_int32_t data;
+
+ if (EREAD1(sc, EAP_UART_STATUS) & EAP_US_RXINT) {
+ while (EREAD1(sc, EAP_UART_STATUS) & EAP_US_RXRDY) {
+ data = EREAD1(sc, EAP_UART_DATA);
+ if (sc->sc_iintr)
+ sc->sc_iintr(sc->sc_arg, data);
+ }
+ }
+ }
+#endif
return (1);
}
@@ -1910,3 +1753,75 @@
return (AUDIO_PROP_MMAP | AUDIO_PROP_INDEPENDENT |
AUDIO_PROP_FULLDUPLEX);
}
+
+#if NMIDI > 0
+int
+eap_midi_open(addr, flags, iintr, ointr, arg)
+ void *addr;
+ int flags;
+ void (*iintr)__P((void *, int));
+ void (*ointr)__P((void *));
+ void *arg;
+{
+ struct eap_softc *sc = addr;
+ u_int32_t uctrl;
+
+ sc->sc_iintr = iintr;
+ sc->sc_ointr = ointr;
+ sc->sc_arg = arg;
+
+ EWRITE4(sc, EAP_ICSC, EREAD4(sc, EAP_ICSC) | EAP_UART_EN);
+ uctrl = 0;
+ if (flags & FREAD)
+ uctrl |= EAP_UC_RXINTEN;
+#if 0
+ /* I don't understand ../midi.c well enough to use output interrupts */
+ if (flags & FWRITE)
+ uctrl |= EAP_UC_TXINTEN; */
+#endif
+ EWRITE1(sc, EAP_UART_CONTROL, uctrl);
+
+ return (0);
+}
+
+void
+eap_midi_close(addr)
+ void *addr;
+{
+ struct eap_softc *sc = addr;
+
+ EWRITE1(sc, EAP_UART_CONTROL, 0);
+ EWRITE4(sc, EAP_ICSC, EREAD4(sc, EAP_ICSC) & ~EAP_UART_EN);
+
+ sc->sc_iintr = 0;
+ sc->sc_ointr = 0;
+}
+
+int
+eap_midi_output(addr, d)
+ void *addr;
+ int d;
+{
+ struct eap_softc *sc = addr;
+ int x;
+
+ for (x = 0; x != MIDI_BUSY_WAIT; x++) {
+ if (EREAD1(sc, EAP_UART_STATUS) & EAP_US_TXRDY) {
+ EWRITE1(sc, EAP_UART_DATA, d);
+ return (0);
+ }
+ delay(MIDI_BUSY_DELAY);
+ }
+ return (EIO);
+}
+
+void
+eap_midi_getinfo(addr, mi)
+ void *addr;
+ struct midi_info *mi;
+{
+ mi->name = "AudioPCI MIDI UART";
+ mi->props = MIDI_PROP_CAN_INPUT;
+}
+
+#endif
Index: sys/dev/pci/eapreg.h
===================================================================
RCS file: eapreg.h
diff -N eapreg.h
--- /dev/null Sat Apr 22 19:02:26 2000
+++ eapreg.h Sat Apr 22 19:48:34 2000
@@ -0,0 +1,263 @@
+/* $OpenBSD$ */
+
+/*
+ *
+ * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Lennart Augustsson <augustss@netbsd.org> and Charles M. Hannum.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the NetBSD
+ * Foundation, Inc. and its contributors.
+ * 4. Neither the name of The NetBSD Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#define PCI_CBIO 0x10
+
+#define EAP_ICSC 0x00 /* interrupt / chip select control */
+#define EAP_SERR_DISABLE 0x00000001
+#define EAP_CDC_EN 0x00000002
+#define EAP_JYSTK_EN 0x00000004
+#define EAP_UART_EN 0x00000008
+#define EAP_ADC_EN 0x00000010
+#define EAP_DAC2_EN 0x00000020
+#define EAP_DAC1_EN 0x00000040
+#define EAP_BREQ 0x00000080
+#define EAP_XTCL0 0x00000100
+#define EAP_M_CB 0x00000200
+#define EAP_CCB_INTRM 0x00000400
+#define EAP_DAC_SYNC 0x00000800
+#define EAP_WTSRSEL 0x00003000
+#define EAP_WTSRSEL_5 0x00000000
+#define EAP_WTSRSEL_11 0x00001000
+#define EAP_WTSRSEL_22 0x00002000
+#define EAP_WTSRSEL_44 0x00003000
+#define EAP_M_SBB 0x00004000
+#define EAP_MSFMTSEL 0x00008000
+#define EAP_SET_PCLKDIV(n) (((n)&0x1fff)<<16)
+#define EAP_GET_PCLKDIV(n) (((n)>>16)&0x1fff)
+#define EAP_PCLKBITS 0x1fff0000
+#define EAP_XTCL1 0x40000000
+#define EAP_ADC_STOP 0x80000000
+#define E1371_SYNC_RES (1<<14)
+
+#define EAP_ICSS 0x04 /* interrupt / chip select status */
+#define EAP_I_ADC 0x00000001
+#define EAP_I_DAC2 0x00000002
+#define EAP_I_DAC1 0x00000004
+#define EAP_I_UART 0x00000008
+#define EAP_I_MCCB 0x00000010
+#define EAP_VC 0x00000060
+#define EAP_CWRIP 0x00000100
+#define EAP_CBUSY 0x00000200
+#define EAP_CSTAT 0x00000400
+#define CT5880_AC97_RESET 0x20000000
+#define EAP_INTR 0x80000000
+
+#define EAP_UART_DATA 0x08
+#define EAP_UART_STATUS 0x09
+#define EAP_US_RXRDY 0x01
+#define EAP_US_TXRDY 0x02
+#define EAP_US_TXINT 0x04
+#define EAP_US_RXINT 0x80
+#define EAP_UART_CONTROL 0x09
+#define EAP_UC_CNTRL 0x03
+#define EAP_UC_TXINTEN 0x20
+#define EAP_UC_RXINTEN 0x80
+#define EAP_MEMPAGE 0x0c
+#define EAP_CODEC 0x10
+#define EAP_SET_CODEC(a,d) (((a)<<8) | (d))
+
+/* ES1371 Registers */
+#define E1371_CODEC 0x14
+#define E1371_CODEC_WIP (1<<30)
+#define E1371_CODEC_VALID (1<<31)
+#define E1371_CODEC_READ (1<<23)
+#define E1371_SET_CODEC(a,d) (((a)<<16) | (d))
+#define E1371_SRC 0x10
+#define E1371_SRC_RAMWE (1<<24)
+#define E1371_SRC_RBUSY (1<<23)
+#define E1371_SRC_DISABLE (1<<22)
+#define E1371_SRC_DISP1 (1<<21)
+#define E1371_SRC_DISP2 (1<<20)
+#define E1371_SRC_DISREC (1<<19)
+#define E1371_SRC_ADDR(a) ((a)<<25)
+#define E1371_SRC_STATE_MASK 0x870000
+#define E1371_SRC_STATE_OK 0x010000
+#define E1371_SRC_DATA(d) (d)
+#define E1371_SRC_DATAMASK 0xffff
+#define E1371_LEGACY 0x18
+
+/* ES1371 Sample rate converter registers */
+#define ESRC_ADC 0x78
+#define ESRC_DAC1 0x74
+#define ESRC_DAC2 0x70
+#define ESRC_ADC_VOLL 0x6c
+#define ESRC_ADC_VOLR 0x6d
+#define ESRC_DAC1_VOLL 0x7c
+#define ESRC_DAC1_VOLR 0x7d
+#define ESRC_DAC2_VOLL 0x7e
+#define ESRC_DAC2_VOLR 0x7f
+#define ESRC_TRUNC_N 0x00
+#define ESRC_IREGS 0x01
+#define ESRC_ACF 0x02
+#define ESRC_VFF 0x03
+#define ESRC_SET_TRUNC(n) ((n)<<9)
+#define ESRC_SET_N(n) ((n)<<4)
+#define ESRC_SMF 0x8000
+#define ESRC_SET_VFI(n) ((n)<<10)
+#define ESRC_SET_ACI(n) (n)
+#define ESRC_SET_ADC_VOL(n) ((n)<<8)
+#define ESRC_SET_DAC_VOLI(n) ((n)<<12)
+#define ESRC_SET_DAC_VOLF(n) (n)
+#define SRC_MAGIC ((1<15)|(1<<13)|(1<<11)|(1<<9))
+
+#define EAP_SIC 0x20
+#define EAP_P1_S_MB 0x00000001
+#define EAP_P1_S_EB 0x00000002
+#define EAP_P2_S_MB 0x00000004
+#define EAP_P2_S_EB 0x00000008
+#define EAP_R1_S_MB 0x00000010
+#define EAP_R1_S_EB 0x00000020
+#define EAP_P2_DAC_SEN 0x00000040
+#define EAP_P1_SCT_RLD 0x00000080
+#define EAP_P1_INTR_EN 0x00000100
+#define EAP_P2_INTR_EN 0x00000200
+#define EAP_R1_INTR_EN 0x00000400
+#define EAP_P1_PAUSE 0x00000800
+#define EAP_P2_PAUSE 0x00001000
+#define EAP_P1_LOOP_SEL 0x00002000
+#define EAP_P2_LOOP_SEL 0x00004000
+#define EAP_R1_LOOP_SEL 0x00008000
+#define EAP_SET_P2_ST_INC(i) ((i) << 16)
+#define EAP_SET_P2_END_INC(i) ((i) << 19)
+#define EAP_INC_BITS 0x003f0000
+
+#define EAP_DAC1_CSR 0x24
+#define EAP_DAC2_CSR 0x28
+#define EAP_ADC_CSR 0x2c
+#define EAP_GET_CURRSAMP(r) ((r) >> 16)
+
+#define EAP_DAC_PAGE 0xc
+#define EAP_ADC_PAGE 0xd
+#define EAP_UART_PAGE1 0xe
+#define EAP_UART_PAGE2 0xf
+
+#define EAP_DAC1_ADDR 0x30
+#define EAP_DAC1_SIZE 0x34
+#define EAP_DAC2_ADDR 0x38
+#define EAP_DAC2_SIZE 0x3c
+#define EAP_ADC_ADDR 0x30
+#define EAP_ADC_SIZE 0x34
+#define EAP_SET_SIZE(c,s) (((c)<<16) | (s))
+
+#define EAP_READ_TIMEOUT 0x1000
+#define EAP_WRITE_TIMEOUT 0x1000
+
+#define EAP_XTAL_FREQ 1411200 /* 22.5792 / 16 MHz */
+
+/* AK4531 registers */
+#define AK_MASTER_L 0x00
+#define AK_MASTER_R 0x01
+#define AK_VOICE_L 0x02
+#define AK_VOICE_R 0x03
+#define AK_FM_L 0x04
+#define AK_FM_R 0x05
+#define AK_CD_L 0x06
+#define AK_CD_R 0x07
+#define AK_LINE_L 0x08
+#define AK_LINE_R 0x09
+#define AK_AUX_L 0x0a
+#define AK_AUX_R 0x0b
+#define AK_MONO1 0x0c
+#define AK_MONO2 0x0d
+#define AK_MIC 0x0e
+#define AK_MONO 0x0f
+#define AK_OUT_MIXER1 0x10
+#define AK_M_FM_L 0x40
+#define AK_M_FM_R 0x20
+#define AK_M_LINE_L 0x10
+#define AK_M_LINE_R 0x08
+#define AK_M_CD_L 0x04
+#define AK_M_CD_R 0x02
+#define AK_M_MIC 0x01
+#define AK_OUT_MIXER2 0x11
+#define AK_M_AUX_L 0x20
+#define AK_M_AUX_R 0x10
+#define AK_M_VOICE_L 0x08
+#define AK_M_VOICE_R 0x04
+#define AK_M_MONO2 0x02
+#define AK_M_MONO1 0x01
+#define AK_IN_MIXER1_L 0x12
+#define AK_IN_MIXER1_R 0x13
+#define AK_IN_MIXER2_L 0x14
+#define AK_IN_MIXER2_R 0x15
+#define AK_M_TMIC 0x80
+#define AK_M_TMONO1 0x40
+#define AK_M_TMONO2 0x20
+#define AK_M2_AUX_L 0x10
+#define AK_M2_AUX_R 0x08
+#define AK_M_VOICE 0x04
+#define AK_M2_MONO2 0x02
+#define AK_M2_MONO1 0x01
+#define AK_RESET 0x16
+#define AK_PD 0x02
+#define AK_NRST 0x01
+#define AK_CS 0x17
+#define AK_ADSEL 0x18
+#define AK_MGAIN 0x19
+#define AK_NPORTS 0x20
+
+#define MAX_NPORTS AK_NPORTS
+
+/* Not sensical for AC97? */
+#define VOL_TO_ATT5(v) (0x1f - ((v) >> 3))
+#define VOL_TO_GAIN5(v) VOL_TO_ATT5(v)
+#define ATT5_TO_VOL(v) ((0x1f - (v)) << 3)
+#define GAIN5_TO_VOL(v) ATT5_TO_VOL(v)
+#define VOL_0DB 200
+
+/* Futzable parms */
+#define EAP_MASTER_VOL 0
+#define EAP_VOICE_VOL 1
+#define EAP_FM_VOL 2
+#define EAP_VIDEO_VOL 2 /* ES1371 */
+#define EAP_CD_VOL 3
+#define EAP_LINE_VOL 4
+#define EAP_AUX_VOL 5
+#define EAP_MIC_VOL 6
+#define EAP_RECORD_SOURCE 7
+#define EAP_OUTPUT_SELECT 8
+#define EAP_MIC_PREAMP 9
+#define EAP_OUTPUT_CLASS 10
+#define EAP_RECORD_CLASS 11
+#define EAP_INPUT_CLASS 12
+
+#define MIDI_BUSY_WAIT 100
+#define MIDI_BUSY_DELAY 100 /* Delay when UART is busy */
+
Index: sys/dev/pci/files.pci
===================================================================
RCS file: /cvs/src/sys/dev/pci/files.pci,v
retrieving revision 1.72
diff -u -r1.72 files.pci
--- sys/dev/pci/files.pci 2000/04/18 19:35:31 1.72
+++ sys/dev/pci/files.pci 2000/04/23 01:48:34
@@ -50,7 +50,7 @@
file dev/pci/bha_pci.c bha_pci
# Ensoniq AudioPCI S5016, 1371
-device eap: audio, auconv, mulaw, ac97
+device eap: audio, auconv, mulaw, ac97, midibus
attach eap at pci
file dev/pci/eap.c eap
Index: sys/arch/i386/conf/GENERIC
===================================================================
RCS file: /cvs/src/sys/arch/i386/conf/GENERIC,v
retrieving revision 1.182
diff -u -r1.182 GENERIC
--- sys/arch/i386/conf/GENERIC 2000/04/16 14:10:19 1.182
+++ sys/arch/i386/conf/GENERIC 2000/04/23 01:48:34
@@ -336,6 +336,7 @@
midi* at opl? # OPL FM synth
midi* at ym?
midi* at mpu?
+midi* at eap? # AudioPCI MIDI UART
# The spkr driver provides a simple tone interface to the built in speaker.
#spkr0 at pcppi? # PC speaker