Subject: Re: USR PCI RapidCom Modem
To: None <port-i386@NetBSD.ORG>
From: Kent Polk <kent@tiamat.goathill.org>
List: port-i386
Date: 11/21/1999 22:06:30
On 20 Nov 1999 21:55:00 -0600, Chris G. Demetriou wrote:
>Jason Thorpe <thorpej@nas.nasa.gov> writes:
>> It would be nice to determine what that "interface" value in the
>> PCI configuration header means.  That might tell you if it's compatible
>> with legacy serial ports.
>
>According to the PCI spec, it's "16550-compatible," but the PCI spec
>says ~nothing re: the meaning of the BARs in this case.
>
>
>If you could change the "#if 0"'s to #if 1's in sys/dev/pci/pci.c, and
>send the resulting information here for that card, that might be
>useful.  (you might need to increase the message buffer size, using
>the MSGBUFSIZE option.)

Here it is:
-----------------------------------------------------------------------------
unknown vendor 0x12b9 product 0x1008 (serial communications, interface 0x02,
revision 0x01) at pci0 dev 12 function 0: PCI configuration registers:
  Common header:
    0x00: 0x100812b9 0x02100001 0x07000201 0x00000000

    Vendor ID: 0x12b9
    Device ID: 0x1008
    Command register: 0x0001
      I/O space accesses: on
      Memory space accesses: off
      Bus mastering: off
      Special cycles: off
      MWI transactions: off
      Palette snooping: off
      Parity error checking: off
      Address/data stepping: off
      System error (SERR): off
      Fast back-to-back transactions: off
    Status register: 0x0210
      66 MHz capable: off
      User Definable Features (UDF) support: off
      Fast back-to-back capable: off
      Data parity error detected: off
      DEVSEL timing: medium (0x1)
      Slave signaled Target Abort: off
      Master received Target Abort: off
      Master received Master Abort: off
      Asserted System Error (SERR): off
      Parity error detected: off
    Class Name: communications (0x07)
    Subclass Name: serial (0x00)
    Interface: 0x02
    Revision ID: 0x01
    BIST: 0x00
    Header Type: 0x00 (0x00)
    Latency Timer: 0x00
    Cache Line Size: 0x00

  Type 0 ("normal" device) header:
    0x10: 0x0000d401 0x00000000 0x00000000 0x00000000
    0x20: 0x00000000 0x00000000 0x00000000 0x00ab12b9
    0x30: 0x00000000 0x000000dc 0x00000000 0x0000010a

    Base address register at 0x10
      type: i/o
      base: 0x0000d400, size: 0x00000008
    Base address register at 0x14
      not implemented(?)
    Base address register at 0x18
      not implemented(?)
    Base address register at 0x1c
      not implemented(?)
    Base address register at 0x20
      not implemented(?)
    Base address register at 0x24
      not implemented(?)
    Cardbus CIS Pointer: 0x00000000
    Subsystem vendor ID: 0x12b9
    Subsystem ID: 0x00ab
    Expansion ROM Base Address: 0x00000000
    Reserved @ 0x34: 0x000000dc
    Reserved @ 0x38: