Subject: question about interrupts
To: None <port-i386@netbsd.org>
From: Manuel Bouyer <bouyer@antioche.lip6.fr>
List: port-i386
Date: 08/31/1999 23:00:42
Hi,
I have a question about how interrups works on the i386.
I have a pci ide controller (Promise) with both channels on irq 5.
Nothing else shares it. I have one drive on each channel, plus a CD
on the first channel as slave.

When I try to access the CD, some irq are missing, and I get 'stray interrupt
7' messages instead. From what I can see these missing irq are ones which
should be a consequence of running irq handler (that is, and irq triggers an
action which triggers another irq), and it's likely that this irq will happen
before the current handler returns (needs some time to check if second channel
has irq pending too, etc ...). The chip notice properly the irq, because if I
start heavy accesses to wd1 (thus flooding irq 5) then my CD works properly,
because the handler gets called for wd1 but also handles the primary channel
(a bit in a PCI register tells if a irq for a given channel is pending), and I
don't get the 'stray interrupt 7' messages.
So some irq are really noticed by the pci board, but the handler never get
calleds.

I tried adding a while() loop, looping in the irq handler while and interrupt
is pending, this didn't help.

So my question is:
it seems (I'm not a specialist of i386 assembly) that when an irq is
triggered, it is ack'd, the cpl is adjusted, interrupts are enabled again
and the handler(s) is(are) called. If the same interrupt occurs before this
one has been serviced it gets queued, and the handler gets called again when
the cpl gets lowered. Is this true ?
Also, to I need to enter splbio() in my irq handler and splx before leaving it,
or is this done automatically by the i386 irq machinery ?

Any help on the subject appreciated.

--
Manuel Bouyer <bouyer@antioche.eu.org>
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