Subject: New ide system step 2 (with DMA !)
To: None <current-users@NetBSD.ORG, port-i386@NetBSD.ORG>
From: Manuel Bouyer <>
List: port-i386
Date: 05/29/1998 19:16:13
I've uploaded a new version of the ide system.
It's still in (I've
renamed the old version).
This file has to be extracted in /usr/src/sys. It contains a buch of
new files, and a patch file (apply with 'patch -p < ide.diff').
(MD5 (newide.tar.gz) = f434be3178f035b966060ea05f43d373)

I've added a new file in sys/dev/ata/ata.c, which contains 'higth level'
functions common to ata and atapi (If someone comes with a better
name, plase say so).
I've changed the way 32-pio are setup: they are now auto-detected
when the drive is probed if the controller has the WDC_CAPABILITY_DATA32
bit set (currently true for wdc_isa, wdc_pcmcia, wdc_isapnp and pciide fronted
I'm not sure wether ofisa or atari controllers may allow this).
This is done by sending 2 IDENTIFY commands (one in 16, one in 32-bit)
and comparing results.
This means that the flags in the kernel config file don't have any meanings
again for IDE controllers.

Following Chris's advices I re-made pciide attach to any device of class
IDE. But this means that some devices may fail, or not used at optimum
performances with this driver, because they need special setup which is
not done (for instance, all drives attached to an 'unknow' pciide controller
will use DMA mode 0 and PIO mode 2 at best).

There is now support for PCI IDE DMA in both pciide and the core wdc driver.
(!! you need sys/arch/i386/i386/machded.c rev >= 1.304 for DMA to work
you will have a quite immediate panic otherwise, or data corruptions
if you compiled your kernel without DIAGNOSTIC).

Actually this touched to the old ISA IDE DMA code, so it may not be working
any more. If someone has such a board, please tell me if you can run
tests (this code was marked as 'untested', anyhow).

DMA has been fairly well tested (it's on my boot/swap drive at home)
on an Intel PIIX3 controller with a PIO mode 3/DMA mode 1 IDE drive,
and a non-dma ATAPI cdrom. Some tests have also been run on
PIIX3 and PIIX4, with PIO mode 3/DMA mode 1 and PIO mode 4/DMA mode 2
drives and ATAPI CDs. 
There is support for the PIIX (which doesn't allow separate timings for
master and slave - not really easy nor clean to deal with this), but
is has not been tested (no hardware).

There is support for Ultra DMA in both pciide and wdc core, but
it doesn't work (I can read the disklabel, but the machine panics soon
after. As it's a PII/300 I don't have the time to see the messages :().
I have sporadic access to an UDMA machine, and I can run tests only from
a boot floppy -> this means no debuggers nor core dumps. I'll try
do progress on this front next friday, but if someone else can
work on this, or provide more informations it would be nice.

This has also been tested on a CMD640.
If you have a special chip which is not yet supported by the driver,
I can add support if someone can run the tests for me and the docs are
freely available.

Also, I'd like to have some feedback about this (failure of course, but also
success !). I'd also like to get it tested not only on 'modern' hardware,
but also old (even ESDI if possible) (I've also tested it on a 486 with
standart controller and drives).
So, if you've tested this code, please send me an E-mail with
which controller and drives you use, which CPU, and which usage

I'll set up a web page with these informations.
For those of you who are lazy :) I'm going to put a GENERIC kernel
and an install floppy image in the same directory the tar.gz file is.
Here are the md5 checksums:
MD5 (netbsd-GENERIC.gz) = 31a013b5cb8f423339012a9aed76d52b (1118929 bytes)
MD5 (boot.fs) = 08a9da2aa6f9eec2df5d830c6aad67ce (1474560 bytes).

For now I'm going to have other activities, far away from computers,
so don't expect to hear anything of me before wenesday.
I'm also going to port this to 1.3.x, if all goes well this should be
ready in 2 weeks.

Happy kernel compiles ! (it's incredible how IDE looks less bad with DMA :)

Manuel Bouyer, LIP6, Universite Paris VI.