Subject: Pentium memory bandwidth restrictions
To: None <port-i386@NetBSD.ORG>
From: Danny Thomas <D.Thomas@vthrc.uq.edu.au>
List: port-i386
Date: 02/17/1998 10:40:19
I'm assuming this has been seen by quite a few people, but any comments on
http://www.intelligentfirm.com/membench/index.shtml ?

if this stands up, then I guess it's a job for gcc, and maybe recoding of
some of the assembler fragments in NetBSD ?

cheers,
Danny Thomas

to quote the first few paragraphs:
>  We have discovered some very significant things that affect the most
>important aspect of recent processors: memory bandwidth. Normally a
>Pentium processor with EDO memory and a recent chip-set should be able
>to read from its main memory at about 185 Mbytes per second. But when
>one measures, with the best accurate way possible, the continuous read
>rate of his/hers PC, the rate achieved is only 117-119 Mbytes/sec! Why?
>Similarly the secondary cache should have a continuous read rate of 339
>Mbytes per second, but the actual achievable is only about 224
>Mbytes/sec ! Why? We found out, that there is a serious undisclosed
> deficiency on all recent processors, which hinders significantly the
>read, search and transfer rates. In simple terms, there is a time
>penalty imposed by Pentium's read buffer. Specifically, when while a
>burst is in progress, a read request is made in the same cache line (on
>the same burst) the processor halts until the burst has finished
>(documented) AND the penalty time expires! (undocumented). We should
>point out, that this affects all normal read, search and transfer loops.