Subject: RE: VIA VP2 chipset
To: None <skippy@macro.stanford.edu, mvanloon@MindBender.serv.net>
From: None <mvanloon@MindBender.serv.net>
List: port-i386
Date: 02/05/1998 23:16:22
So current PCI devices are parity protected, if they correctly implement
the current PCI (2.0? 2.1?) spec.  This is a good thing.

> -----Original Message-----
> From:	Bill Studenmund [SMTP:skippy@macro.stanford.edu]
> Sent:	Thursday, February 05, 1998 3:51 PM
> 
> On Thu, 5 Feb 1998 mvanloon@MindBender.serv.net wrote:
> 
> > Are you saying the current PCI specs require all the control, data,
> and
> > address lines to be parity protected, or this would be required in
> your
> > ideal world view?
> 
> Right now. The PCI spec has a 32-bit address/data bus (w/ a 64-bit
> extention), 4 control/byte enable bits, and a parity bit encompasing
> the
> above (actually I think the 64-bit extention has its own parity bit so
> 32-bit devices don't get confused).
>