Are you saying the current PCI specs require all the control, data, and
address lines to be parity protected, or this would be required in your
ideal world view?

> -----Original Message-----
> From:	ws@tools.de [SMTP:ws@tools.de]
> Sent:	Thursday, February 05, 1998 10:42 AM
> To:	port-i386@NetBSD.ORG; wolfgang@wsrcc.com
> Subject:	Re: VIA VP2 chipset
> 
> > Although it strikes me that a real fault tolerant (fault detecting)
> > system would still need to also carry ECC/parity bits end-to-end to
> > all the chips attached to the data bus.  Certainly one would need
> all
> 
> Ah, what I forgot to mention
> The PCI bus is also required to have parity bits on both address and
> data
> transactions.  Not only the address resp. data bits are included in
> the
> parity check but also some of the control signals.
>