> Although it strikes me that a real fault tolerant (fault detecting)
> system would still need to also carry ECC/parity bits end-to-end to
> all the chips attached to the data bus.  Certainly one would need all
> the IO chips to generate parity and send it.  For example, what good
> would it do to have memory ecc-ed all the way to the internal cpu data
> bus, only to have noise corrupt data on the bus between the ethernet
> DMA and memory.  (And who knows if this isn't happening in real life.
> It may well be the cause of some of the bad IP checksums that one
> occasionally sees on direct ethernet connections.  These bad IP
> checksums clearly aren't happening on the wire since the ethernet CRC
> would flag them and there aren't enough bad CRC's to account for such
> a large number of bad packets slipping by.)

Ah, what I forgot to mention

The PCI bus is also required to have parity bits on both address and data
transactions.  Not only the address resp. data bits are included in the
parity check but also some of the control signals.

Just some more food for thought :-)

Ciao,
Wolfgang
-- 
ws@TooLs.DE     (Wolfgang Solfrank, TooLs GmbH) 	+49-228-985800