>On Fri, 21 Jun 1996 17:09:38 -0700 
> "Kevin M. Lahey" <kml@nas.nasa.gov> wrote:
> > When I run with the 512KB pipeline burst cache COAST module, 
> > I get pretty horrible cache access results.  In fact, I get the
> > same results whether or not I have the COAST module installed.
> > I've tried several different COAST modules with no success.

>When the COAST is installed, does the BIOS recognize the cache?  If the 
>results are the same, it sounds like it never gets enabled.

It's also possible that you just have a bad motherboard, or coast
module(s).  And Jason's question is a good one -- does the BIOS seem
to correctly identify the coast module?

> > When I run with a 256KB pipeline burst cache COAST module,
> > the kernel panics with a page fault in supervisor mode,
> > usually after core dumping on the compiles that start up
> > lmbench.  It is a little more robust when I run it at 133 MHz
> > rather than 166 MHz, but it still seems to panic eventually.

This sounds more like a CPU problem.  166MHz and 133MHz both have
exactly the same external bus speed (~66.7MHz), so you should see no
difference in behavior if the problem is outside the CPU.

Do you have a decent heat sink and fan on the chip?  Does the heat
sink make _uniform_ contact with the chip across the entire surface?
If it's a heat sink without adhesive, go to Radio Shack and pick up a
little tube of their silicone heat sink compound (little blue and
white tube) and carefully spread that across the entire surface of the
chip (just a thin layer) and carefully but firmly reapply the heat
sink.  It's kind of messy, but it's worth it.

Assuming the problem isn't the CPU, you might also try a memory bus
speed of 60MHz, instead of the ~66MHz you're using with both 166MHz
(~66.7 * 2.5) and 133MHz (~66.7 * 2).  This is in case your RAM just
can't keep up.  Try running at 150MHz (60 * 2.5) or 120MHz (60 * 2).

>Well, here's my one speculation...this assumes that the cache is a 
>write-back type (which Kevin and I honestly don't know, since neither the 
>BIOS nor manual seemed willing to tell us...)

On my ASUS P55TP4N, the motherboard L2 cache is write-through, and the
Pentium's on-chip L1 cache is write-back.  I would expect this to be
the typical arrangement since the Pentium is designed with an internal
L1 write-back cache, and having two write-back caches makes the
coherency logic much more complicated.

-----------------------------------------------------------------------------
  Michael L. VanLoon                                 michaelv@HeadCandy.com
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