>The performance kind of sucks.  It would be better if the driver
>supported DMA, primarily because it could then safely do synchronous
>negotiation.

Hmmm.

>(There appears to be a design flaw in the chip that precludes the use
>of synchronous mode with PIO.  This causes the driver to lose with
>some fast devices, until a few minutes ago when I disabled synchronous
>mode in -current.  I've analyzed this problem fairly thoroughly, and
>sent off a few queries to Adaptec, but have received no answers at
>all.)

Does the 6360 have a CLRCHN control bit?  If so, when are you setting
it?  This sounds very similar to an ancient bug in the aic7xxx
sequencer code (two years ago by now?).  CLRCHN must be set immediately
after the (re)selection in order to not lose data on fast devices in
sync mode.

>Implementing DMA mode would be easier if the documentation for the
>chip didn't also kind of suck.  To top it off, there are no drivers
>for it that I can find that actually use DMA, so it's possible that it
>doesn't work right either.  I personally don't have time to experiment
>with it.

The last time I looked at the aic driver, the registers layout looked very
similar to the aic7xxx chips.  You may want to order the aic7770 or aic7880
tech ref (or read the aic7xxx sequencer code) and see if it helps.

--
Justin T. Gibbs
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