Hello,

I am currently working on a bootloader for a hpcmips device. I have got it 
booting and recognizing most of the builtin hardware.

But now I am somewhat stuck. The device has a VR4121 CPU and VRC4172 
(dmesg is attached). The USB controller in the VRC4172 (ohci) is the 
problem: If I boot from ROM the kernel will hang after enabling periodic 
list processing on the controller (Bit PLE in the HcControl Register). If 
I do not set this bit the kernel will boot but usb is not fully 
functional. Booting the same kernel (the one setting the PLE bit) from 
Windows CE with hpcboot results in a working USB Controller.

I checked the settings of the interrupt registers but I can see no 
differnce. The controller requires DMA access to memory, so this could be 
the problem.

The dmesg shows some part of the output of the uhub device recognized by 
autoconf. This will not show up if I enable more debug output inside the 
ohci driver, I can't even get a full output of ohci_dumpregs() after the 
initialization of the ohci is complete. The bootloader itself is based on 
lcboot.

If more information is required I can post it here.

---------dmesg from romboot-------------------

>> NetBSD/hpcmips MOBIC-T8 Boot, Revision 1.1
>> (markus@markus, Fri Nov  5 08:54:55 CET 2004)
0
2408240+431988 [97984+88852]=0x2e3354
Starting NetBSD
mem_cluster_cnt = 3
mem_clusters[0] = {0x0,0x326000}
mem_clusters[1] = {0x326000,0x1cda000}
mem_clusters[2] = {0x2000000,0x1000000}
loading 0x326000,0x1cda000
loading 0x2000000,0x1000000
Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004
     The NetBSD Foundation, Inc.  All rights reserved.
Copyright (c) 1982, 1986, 1989, 1991, 1993
     The Regents of the University of California.  All rights reserved.

NetBSD 2.0_RC4 (MOBIC) #187: Fri Nov  5 09:04:14 CET 2004
         markus@markus:/usr/obj/hpcmips/sys/arch/hpcmips/compile/MOBIC
SIEMENST8 (NEC VR4121 rev1.2 168.521MHz)
total memory = 49152 KB
total memory banks = 3
memory bank 0 = 0x00000000 3224KB(0x00326000)
memory bank 1 = 0x00326000 29544KB(0x01cda000)
memory bank 2 = 0x02000000 16384KB(0x01000000)
avail memory = 44660 KB
mainbus0 (root)
cpu0 at mainbus0: NEC VR4100 CPU (0xc60) Rev. 6.0 with software emulated floatin
g point
cpu0: 16KB/16B direct-mapped L1 Instruction cache, 32 TLB entries
cpu0: 8KB/16B direct-mapped write-back L1 Data cache
vr4102ip0 at mainbus0
vrbcu0 at vr4102ip0 addr 0x0b000000-001f
vrbcu0: CPU 168.521MHz, bus 28.086MHz, ram 56.173MHz
vrcmu0 at vr4102ip0 addr 0x0b000060-007f
vrgiu0 at vr4102ip0 addr 0x0b000100-011f
                                              3         2         1
                                             10987654321098765432109876543210
WIN setting:                                iiiiiiiiiiiiiiiiHohlihiiiiiilihi
I/O setting:                                iiiiiiiiiiiiiiiiioiiiiiiiiiiiiii
        data:....................|.||||||||||...................||..||.||||.|
hpcioman0 at vrgiu0
hpcin0 at hpcioman0 iochip vrgiu0, port 12, type 5, id 256, interrupt level low
ds2430a0 at vrgiu0 port=2 id=0: ROM 85 00000064f57b 14 CRC 00 STATUS 0800066b0ab
8 CRC 10f8
pwr0 at vrgiu0 external ac port=8 battery1=9 battery2=11 id=-1 active=high sense
=edge
vrc4172gpio0 at vrgiu0
       port#:321098765432109876543210
  EXGPDATA  :111101010100010011100000
WIN setting:ooPoioiooioiiooioioooooo
hpcioman1 at vrc4172gpio0
max1611cse0 at vrc4172gpio0 port(lcd,backlight,clock,data)=18,9,16,17 id=-1 stat
e=on
smc91cxxpwr0 at vrc4172gpio0 port(power,reset,cs,phy_rst)=8,4,20,13 id=-1
hpcled0 at vrc4172gpio0 port=0 id=-1 state=off
hpcled1 at vrc4172gpio0 port=1 id=-1 state=off
hpcled2 at vrc4172gpio0 port=2 id=-1 state=off
hpcled3 at vrc4172gpio0 port=3 id=-1 state=off
pwctl0 at vrgiu0 port=14 id=0 on=1
mq200: probe: vendor id=4d51 product id=0200
vrdmaau0 at vr4102ip0 addr 0x0b000020-0037
vrdcu0 at vr4102ip0 addr 0x0b000040-004b
com0 at vr4102ip0 addr 0x0c000000-0007: ns16550a, working fifo
com0: console
com0: pwctl -1
vrrtc0 at vr4102ip0 addr 0x0b0000c0-00df
vrkiu0 at vr4102ip0 addr 0x0b000180-019f
hpckbd0 at vrkiu0
wskbd0 at hpckbd0 mux 1
vrpmu0 at vr4102ip0 addr 0x0b0000a0-00bf
vrpmu: RTC reset detected
vrpmu: RESET switch detected
vrdsu0 at vr4102ip0 addr 0x0b0000e0-00e7
vrpiu0 at vr4102ip0 addr 0x0b000120-013f, 0x0b0002a0-02bf
wsmouse0 at vrpiu0 mux 0
mq200: probe: vendor id=4d51 product id=0200
mqvideo0 at vr4102ip0 addr 0x0a000000-7fffff: MQ200 Rev.02 video controller
mqvideo0: framebuffer address: 0xaa0ea600
mq200: init_brightness
mq200: init_contrast
mq200: init_backlight: real backlight=1
hpcfb0 at mqvideo0
wsdisplay0 at hpcfb0 kbdmux 1
wsmux1: connecting to wsdisplay0
wskbd0: connecting to wsdisplay0
hpcfb: 800x600 pixels, 65536 colors, 100x60 chars
wsdisplay0: screen 0 added (std, vt100 emulation)
vrc4172pci0 at vr4102ip0 addr 0x0aff0cf8-0cff
Setting up PCI Bus 0
pci0 at vrc4172pci0 bus 0
pci0: i/o space, memory space enabled, rd/line ok
pchb0 at pci0 dev 0 function 0: PCI configuration registers:
   Common header:
     0x00: 0x00001033 0x24000007 0x06000003 0x00800000

     Vendor Name: NEC (0x1033)
     Device Name: PCI Host Bridge (0x0000)
     Command register: 0x0007
       I/O space accesses: on
       Memory space accesses: on
       Bus mastering: on
       Special cycles: off
       MWI transactions: off
       Palette snooping: off
       Parity error checking: off
       Address/data stepping: off
       System error (SERR): off
       Fast back-to-back transactions: off
     Status register: 0x2400
       Capability List support: off
       66 MHz capable: off
       User Definable Features (UDF) support: off
       Fast back-to-back capable: off
       Data parity error detected: off
       DEVSEL timing: slow (0x2)
       Slave signaled Target Abort: off
       Master received Target Abort: off
       Master received Master Abort: on
       Asserted System Error (SERR): off
       Parity error detected: off
     Class Name: bridge (0x06)
     Subclass Name: host (0x00)
     Interface: 0x00
     Revision ID: 0x03
     BIST: 0x00
     Header Type: 0x00+multifunction (0x80)
     Latency Timer: 0x00
     Cache Line Size: 0x00

   Type 0 ("normal" device) header:
     0x10: 0x0af00000 0x00000000 0x00000000 0x00000000
     0x20: 0x00000000 0x00000000 0x00000000 0x00000000
     0x30: 0x00000000 0x00000000 0x00000000 0x00000000

     Base address register at 0x10
       type: 32-bit nonprefetchable memory
       base: 0x0af00000, not sized
     Base address register at 0x14
       not implemented(?)
     Base address register at 0x18
       not implemented(?)
     Base address register at 0x1c
       not implemented(?)
     Base address register at 0x20
       not implemented(?)
     Base address register at 0x24
       not implemented(?)
     Cardbus CIS Pointer: 0x00000000
     Subsystem vendor ID: 0x0000
     Subsystem ID: 0x0000
     Expansion ROM Base Address: 0x00000000
     Reserved @ 0x34: 0x00000000
     Reserved @ 0x38: 0x00000000
     Maximum Latency: 0x00
     Minimum Grant: 0x00
     Interrupt pin: 0x00 (none)
     Interrupt line: 0x00

   Device-dependent header:
     0x40: 0x00000000 0x00000000 0x00000000 0x00000000
     0x50: 0x44340203 0x00000000 0x00000000 0x00000000
     0x60: 0x00000000 0x00000000 0x00000000 0x00000000
     0x70: 0x00000000 0x00000000 0x00000000 0x00000000
     0x80: 0x00000000 0x00000000 0x00000000 0x00000000
     0x90: 0x00000000 0x00000000 0x00000000 0x00000000
     0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xf0: 0x00000000 0x00000000 0x00000000 0x00000000

     Don't know how to pretty-print device-dependent header.

NEC PCI Host Bridge (host bridge, revision 0x03) at ? dev 0 function 0 (intrswiz
  0, intrpin 0, i/o on, mem on, no quirks)
pchb0: NEC VRC4172A System Controller (rev. 0x03)
ohci0 at pci0 dev 0 function 1: PCI configuration registers:
   Common header:
     0x00: 0x00001033 0x82000106 0x0c031000 0x00801000

     Vendor Name: NEC (0x1033)
     Device Name: PCI Host Bridge (0x0000)
     Command register: 0x0106
       I/O space accesses: off
       Memory space accesses: on
       Bus mastering: on
       Special cycles: off
       MWI transactions: off
       Palette snooping: off
       Parity error checking: off
       Address/data stepping: off
       System error (SERR): on
       Fast back-to-back transactions: off
     Status register: 0x8200
       Capability List support: off
       66 MHz capable: off
       User Definable Features (UDF) support: off
       Fast back-to-back capable: off
       Data parity error detected: off
       DEVSEL timing: medium (0x1)
       Slave signaled Target Abort: off
       Master received Target Abort: off
       Master received Master Abort: off
       Asserted System Error (SERR): off
       Parity error detected: on
     Class Name: serial bus (0x0c)
     Subclass Name: USB (0x03)
     Interface: 0x10
     Revision ID: 0x00
     BIST: 0x00
     Header Type: 0x00+multifunction (0x80)
     Latency Timer: 0x10
     Cache Line Size: 0x00

   Type 0 ("normal" device) header:
     0x10: 0x0afef000 0x00000000 0x00000000 0x00000000
     0x20: 0x00000000 0x00000000 0x00000000 0x00000000
     0x30: 0x00000000 0x00000000 0x00000000 0x1501011f

     Base address register at 0x10
       type: 32-bit nonprefetchable memory
       base: 0x0afef000, size: 0x00001000
     Base address register at 0x14
       not implemented(?)
     Base address register at 0x18
       not implemented(?)
     Base address register at 0x1c
       not implemented(?)
     Base address register at 0x20
       not implemented(?)
     Base address register at 0x24
       not implemented(?)
     Cardbus CIS Pointer: 0x00000000
     Subsystem vendor ID: 0x0000
     Subsystem ID: 0x0000
     Expansion ROM Base Address: 0x00000000
     Reserved @ 0x34: 0x00000000
     Reserved @ 0x38: 0x00000000
     Maximum Latency: 0x15
     Minimum Grant: 0x01
     Interrupt pin: 0x01 (pin A)
     Interrupt line: 0x1f

   Device-dependent header:
     0x40: 0x00000000 0x00000000 0x00000000 0x00000000
     0x50: 0x00000000 0x00000000 0x00000000 0x00000000
     0x60: 0x00000000 0x00000000 0x00000000 0x00000000
     0x70: 0x00000000 0x00000000 0x00000000 0x00000000
     0x80: 0x00000000 0x00000000 0x00000000 0x00000000
     0x90: 0x00000000 0x00000000 0x00000000 0x00000000
     0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
     0xf0: 0x00000000 0x00000000 0x00000000 0x00000000

     Don't know how to pretty-print device-dependent header.

NEC PCI Host Bridge (USB serial bus, interface 0x10) at ? dev 0 function 1 (intr
swiz 0, intrpin 0x1, i/o off, mem on, no quirks): NEC PCI Host Bridge (rev. 0x00
)
ohci0: interrupting at pciintr 0:0:1
ohci0: OHCI version 1.0
usb0 at ohci0: USB revision 1.0
uhub0 at usb0
uhub0: NEC OHCI root hub,